diff options
| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-12-18 15:01:24 +0000 |
|---|---|---|
| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-12-18 15:01:24 +0000 |
| commit | e8c818e1cd78e69a3cb2ad9785a48a858f34415c (patch) | |
| tree | 3a5514d022392cf4d8fa368f9f02653da21a93ca /it87spi.c | |
| parent | baf84624cd340c9b8dfaa45c56060ab788f4945e (diff) | |
| download | flashrom-e8c818e1cd78e69a3cb2ad9785a48a858f34415c.tar.gz | |
Add struct flashctx * parameter to all functions accessing flash chips.
All programmer access function prototypes except init have been made
static and moved to the respective file.
A few internal functions in flash chip drivers had chipaddr parameters
which are no longer needed.
The lines touched by flashctx changes have been adjusted to 80 columns
except in header files.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'it87spi.c')
| -rw-r--r-- | it87spi.c | 18 |
1 files changed, 11 insertions, 7 deletions
@@ -103,8 +103,10 @@ void probe_superio_ite(void) return; } -static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); +static int it8716f_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr); static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf, @@ -247,8 +249,10 @@ int init_superio_ite(void) * commands with the address in inverse wire order. That's why the register * ordering in case 4 and 5 may seem strange. */ -static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int it8716f_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { uint8_t busy, writeenc; int i; @@ -319,19 +323,19 @@ static int it8716f_spi_page_program(struct flashctx *flash, uint8_t *buf, int result; chipaddr bios = flash->virtual_memory; - result = spi_write_enable(); + result = spi_write_enable(flash); if (result) return result; /* FIXME: The command below seems to be redundant or wrong. */ OUTB(0x06, it8716f_flashport + 1); OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); for (i = 0; i < flash->page_size; i++) - chip_writeb(buf[i], bios + start + i); + chip_writeb(flash, buf[i], bios + start + i); OUTB(0, it8716f_flashport); /* Wait until the Write-In-Progress bit is cleared. * This usually takes 1-10 ms, so wait in 1 ms steps. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(1000); return 0; } |