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| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-11-25 02:07:30 +0000 |
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| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-11-25 02:07:30 +0000 |
| commit | 6f7ac460c5b185a33322b9a80a2379b70ac8decc (patch) | |
| tree | d7437011a0195845d062b9be494fa94fc8c863b5 /jedec.c | |
| parent | b11957a290eee1e1df99e2ec6cbde765be984bea (diff) | |
| download | flashrom-6f7ac460c5b185a33322b9a80a2379b70ac8decc.tar.gz | |
Kill hardcoded block erase on ICH SPI.
The existing code does not work for all SPI chips, and it just was a
band-aid to cope with locked down chipsets back in a time when there was
no eraseblock infrastructure.
Basically, this unbreaks a few SPI chips on ICH.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Maciej Pijanka <maciej.pijanka@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'jedec.c')
0 files changed, 0 insertions, 0 deletions