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| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-11-26 16:51:39 +0000 |
|---|---|---|
| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-11-26 16:51:39 +0000 |
| commit | 8c16ae5dd840c1523d3323f78827b51e540e6d33 (patch) | |
| tree | 3e9502680cf7012d60cb8e4e320616170d4feb54 /jedec.c | |
| parent | 03024561cfc841ad3a0a7f1999c732efdbba5b39 (diff) | |
| download | flashrom-8c16ae5dd840c1523d3323f78827b51e540e6d33.tar.gz | |
Add support for Intel 3400 series / 5 series chipset.
Found in Intel document 322170 (Intel 5 Series Chipset and Intel 3400
Series Chipset Specification Update).
According to http://pciids.sourceforge.net/ we probably should match all
IDs from 0x3b00-0x3b1f, but so far I didn't find an Intel doc saying the
same.
If anybody has contacts at Intel and can check, I'd be happy to add the
rest of the IDs.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'jedec.c')
0 files changed, 0 insertions, 0 deletions