Switch SST49LF004A/B to block erase, remove the hack which simulated

(unsupported) chip erase.
Annotate SST49LF004B quirks for TBL#.

Add TEST_OK_PRW which is useful when a PREW chip gets a new erase
routine.

Change a few erase function prototypes to use unsigned int instead of
int.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>


git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 2 insertions, 2 deletions

diff --git a/jedec.c b/jedec.c
index d51f122..7029e98 100644
--- a/jedec.c
+++ b/jedec.c
@@ -175,7 +175,7 @@ int probe_jedec(struct flashchip *flash)
 	return 0;
 }
 
-int erase_sector_jedec(struct flashchip *flash, unsigned int page, int pagesize)
+int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -204,7 +204,7 @@ int erase_sector_jedec(struct flashchip *flash, unsigned int page, int pagesize)
 	return 0;
 }
 
-int erase_block_jedec(struct flashchip *flash, unsigned int block, int blocksize)
+int erase_block_jedec(struct flashchip *flash, unsigned int block, unsigned int blocksize)
 {
 	chipaddr bios = flash->virtual_memory;