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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2007-11-13 14:56:54 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2007-11-13 14:56:54 +0000
commitea65f8af88144f6f2c7bf340e04968e5e22e579c (patch)
tree3e2d2d79adbc8d57e41123594d70201cad9da90e /jedec.c
parentd6bc55e94fd714006c8db7f3a857647f5ac41e1d (diff)
downloadflashrom-ea65f8af88144f6f2c7bf340e04968e5e22e579c.tar.gz
Original v2 revision: 2962
Fix ATMEL 29C020 detection with flashrom. The JEDEC probe routine had a delay of 10 us after entering ID mode and this was insufficient for the 29C020. The data sheet claims we have to wait 10 ms, but tests have shown that 20 us suffice. Allow for variations in chip delays with a factor of 2 safety margin. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'jedec.c')
-rw-r--r--jedec.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/jedec.c b/jedec.c
index 46153dd..30d0cda 100644
--- a/jedec.c
+++ b/jedec.c
@@ -89,7 +89,11 @@ int probe_jedec(struct flashchip *flash)
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0x90;
- myusec_delay(10);
+ /* Older chips may need up to 100 us to respond. The ATMEL 29C020
+ * needs 10 ms according to the data sheet, but it has been tested
+ * to work reliably with 20 us. Allow a factor of 2 safety margin.
+ */
+ myusec_delay(40);
/* Read product ID */
id1 = *(volatile uint8_t *)bios;
@@ -101,7 +105,7 @@ int probe_jedec(struct flashchip *flash)
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
*(volatile uint8_t *)(bios + 0x5555) = 0xF0;
- myusec_delay(10);
+ myusec_delay(40);
printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
if (id1 == flash->manufacture_id && id2 == flash->model_id)