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author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-05-28 15:53:08 +0000 |
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committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-05-28 15:53:08 +0000 |
commit | c8bd93d08baccee3715ad418fc18a0d9f54bf3e0 (patch) | |
tree | 3a8deb77453a25d539577a7bfe50aa2bf98682f6 /layout.c | |
parent | 4031f6d1df1980c73eb8e67dd048f70cdf975d3b (diff) | |
download | flashrom-c8bd93d08baccee3715ad418fc18a0d9f54bf3e0.tar.gz |
ICH SPI can enforce address restrictions for all accesses which take an
address (well, it could if the chipset implementation was not broken).
Since exploiting the broken implementation is harder than conforming to
the address restrictions wherever possible, conform to the address
restrictions instead.
This patch eliminates a lot of transaction errors people were seeing
on chip probe.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'layout.c')
0 files changed, 0 insertions, 0 deletions