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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2012-07-16 21:32:19 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2012-07-16 21:32:19 +0000
commit09f649c339b398504e00115fc63ad737986257e0 (patch)
tree354156bfe1b3fb86e745287baf9602088c18bb14 /nicintel.c
parent731beee04c942a9d7be2ab4f227440e94542bdaa (diff)
downloadflashrom-09f649c339b398504e00115fc63ad737986257e0.tar.gz
Check vendor_id for PCI based external programmers.
Restructure PCI device detection code. Rename pcidev_validate to pcidev_readbar. Note: Slight changes in behaviour are possible, especially on dual/quad chip NICs which appear as more than one PCI device. Found devices are no longer printed at _pinfo level, but rather at _pdbg level. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'nicintel.c')
-rw-r--r--nicintel.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/nicintel.c b/nicintel.c
index 0415f46..49bdec2 100644
--- a/nicintel.c
+++ b/nicintel.c
@@ -87,7 +87,7 @@ int nicintel_init(void)
goto error_out_unmap;
/* FIXME: Using pcidev_dev _will_ cause pretty explosions in the future. */
- addr = pcidev_validate(pcidev_dev, PCI_BASE_ADDRESS_0, nics_intel);
+ addr = pcidev_readbar(pcidev_dev, PCI_BASE_ADDRESS_0);
/* FIXME: This is not an aligned mapping. Use 4k? */
nicintel_control_bar = physmap("Intel NIC control/status reg",
addr, NICINTEL_CONTROL_MEMMAP_SIZE);