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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2011-03-08 00:23:49 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2011-03-08 00:23:49 +0000
commit9c2315a241c8f272d1d38030ad88b899d4a0250d (patch)
tree8881584a476cc76b2e91ce92752029952b8e1f41 /nicrealtek.c
parentb752d04bf3a801e4a0cb23b33a921b840f53c846 (diff)
downloadflashrom-9c2315a241c8f272d1d38030ad88b899d4a0250d.tar.gz
Various IT85* cleanups and fixes.
Fix a few typos. Change the EC memory region mapping name. Drop unused function parameter. Use mmio_writeb()/mmio_readb() to get reliable access to volatile memory locations instead of plain pointer access which is optimized away by gcc. Use own it85_* SPI high-level chip read/write functions instead of relying on unrelated ICH functions. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> David writes: I applied the patch against the Chromium OS branch and successfully tested read and write operations on a Cr48. Acked-by: David Hendricks <dhendrix@google.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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