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authorstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2012-08-25 02:07:20 +0000
committerstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2012-08-25 02:07:20 +0000
commit914f56fb2dd08287ec36a7dc1b9dce78ffbcc558 (patch)
tree791e559595e9c513c96d00e6c05aa5a8f7db27d4 /satasii.c
parent913baf3ae389da095d36423d5ecb58ff453a2a85 (diff)
downloadflashrom-914f56fb2dd08287ec36a7dc1b9dce78ffbcc558.tar.gz
Clean up satasii.c.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'satasii.c')
-rw-r--r--satasii.c19
1 files changed, 6 insertions, 13 deletions
diff --git a/satasii.c b/satasii.c
index 0bea942..e210e10 100644
--- a/satasii.c
+++ b/satasii.c
@@ -20,8 +20,6 @@
/* Datasheets can be found on http://www.siliconimage.com. Great thanks! */
-#include <stdlib.h>
-#include "flash.h"
#include "programmer.h"
#include "hwaccess.h"
@@ -29,7 +27,7 @@
#define SATASII_MEMMAP_SIZE 0x100
-uint8_t *sii_bar;
+static uint8_t *sii_bar;
static uint16_t id;
const struct pcidev_status satas_sii[] = {
@@ -43,10 +41,8 @@ const struct pcidev_status satas_sii[] = {
{},
};
-static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val,
- chipaddr addr);
-static uint8_t satasii_chip_readb(const struct flashctx *flash,
- const chipaddr addr);
+static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
+static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr);
static const struct par_programmer par_programmer_satasii = {
.chip_readb = satasii_chip_readb,
.chip_readw = fallback_chip_readw,
@@ -85,8 +81,7 @@ int satasii_init(void)
reg_offset = 0x50;
}
- sii_bar = physmap("SATA SIL registers", addr, SATASII_MEMMAP_SIZE) +
- reg_offset;
+ sii_bar = physmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE) + reg_offset;
/* Check if ROM cycle are OK. */
if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26))))
@@ -100,8 +95,7 @@ int satasii_init(void)
return 0;
}
-static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val,
- chipaddr addr)
+static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
{
uint32_t ctrl_reg, data_reg;
@@ -118,8 +112,7 @@ static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val,
while (pci_mmio_readl(sii_bar) & (1 << 25)) ;
}
-static uint8_t satasii_chip_readb(const struct flashctx *flash,
- const chipaddr addr)
+static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr)
{
uint32_t ctrl_reg;