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author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-08-29 03:41:57 +0000 |
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committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-08-29 03:41:57 +0000 |
commit | e4c53633a22ba0650e4b729e77dcbdef0ff525de (patch) | |
tree | d45db97be9afb075aa376da6b39e8518011255ed /satasii.c | |
parent | 077a999670d62dd543c46e4f0cc790c8f9f424d9 (diff) | |
download | flashrom-e4c53633a22ba0650e4b729e77dcbdef0ff525de.tar.gz |
Remove potential endless loops from satasii.c.
This is based on the idea from the "Make satasii driver more robust" patch
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
It factors out the wait loop and replaces all potential endless
loops instead of just a few.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'satasii.c')
-rw-r--r-- | satasii.c | 27 |
1 files changed, 19 insertions, 8 deletions
@@ -61,6 +61,20 @@ static int satasii_shutdown(void *data) return 0; } +static uint32_t satasii_wait_done(void) +{ + uint32_t ctrl_reg; + int i = 0; + while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) { + if (++i > 10000) { + msg_perr("%s: control register stuck at %08x, ignoring.\n", + __func__, pci_mmio_readl(sii_bar)); + break; + } + } + return ctrl_reg; +} + int satasii_init(void) { uint32_t addr; @@ -97,9 +111,8 @@ int satasii_init(void) static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { - uint32_t ctrl_reg, data_reg; - - while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) ; + uint32_t data_reg; + uint32_t ctrl_reg = satasii_wait_done(); /* Mask out unused/reserved bits, set writes and start transaction. */ ctrl_reg &= 0xfcf80000; @@ -109,14 +122,12 @@ static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipa pci_mmio_writel(data_reg, (sii_bar + 4)); pci_mmio_writel(ctrl_reg, sii_bar); - while (pci_mmio_readl(sii_bar) & (1 << 25)) ; + satasii_wait_done(); } static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr) { - uint32_t ctrl_reg; - - while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) ; + uint32_t ctrl_reg = satasii_wait_done(); /* Mask out unused/reserved bits, set reads and start transaction. */ ctrl_reg &= 0xfcf80000; @@ -124,7 +135,7 @@ static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr a pci_mmio_writel(ctrl_reg, sii_bar); - while (pci_mmio_readl(sii_bar) & (1 << 25)) ; + satasii_wait_done(); return (pci_mmio_readl(sii_bar + 4)) & 0xff; } |