summaryrefslogtreecommitdiff
path: root/sb600spi.c
diff options
context:
space:
mode:
authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2009-06-16 08:55:44 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2009-06-16 08:55:44 +0000
commit36a4bafe1fcccdf2695ece4844e843a33f719478 (patch)
tree29b0a806979474c3d8dcbc6acfa7022728ca4a15 /sb600spi.c
parente54a1e5978900499b189780d870c547f51cd0534 (diff)
downloadflashrom-36a4bafe1fcccdf2695ece4844e843a33f719478.tar.gz
This patch gives us arbitrary range reads at byte boundaries for every
single chip supported by flashrom. That means you can tell flashrom to read exactly bytes 12345-56789 (start 12345, length 44445) and it will not fetch a single byte more. Uwe tested this on one LPC, one SPI, and one parallel flash board. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'sb600spi.c')
-rw-r--r--sb600spi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sb600spi.c b/sb600spi.c
index 259ad27..f4f3492 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -39,10 +39,10 @@ struct sb600_spi_controller {
struct sb600_spi_controller *spi_bar = NULL;
uint8_t *sb600_spibar;
-int sb600_spi_read(struct flashchip *flash, uint8_t *buf)
+int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
{
/* Maximum read length is 8 bytes. */
- return spi_read_chunked(flash, buf, 8);
+ return spi_read_chunked(flash, buf, start, len, 8);
}
uint8_t sb600_read_status_register(void)