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| author | uwe <uwe@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-08-26 21:11:41 +0000 |
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| committer | uwe <uwe@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-08-26 21:11:41 +0000 |
| commit | cde6d7bf3d865e4472921f8fada14bcd9a46cae8 (patch) | |
| tree | 0f2036a03849d5b3e4824e4a4391f7cc45892f7c /sb600spi.c | |
| parent | a49bce201a00f65ed1fc7f6fbaf76076fc26dd70 (diff) | |
| download | flashrom-cde6d7bf3d865e4472921f8fada14bcd9a46cae8.tar.gz | |
Add AMD Hudson chipset-enable.
AMD Hudson has different vendor/device IDs than AMD SBx00, handle
that properly.
Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'sb600spi.c')
| -rw-r--r-- | sb600spi.c | 7 |
1 files changed, 5 insertions, 2 deletions
@@ -259,8 +259,11 @@ int sb600_probe_spi(struct pci_dev *dev) smbus_dev = pci_dev_find(0x1002, 0x4385); if (!smbus_dev) { - msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n"); - return ERROR_NONFATAL; + smbus_dev = pci_dev_find(0x1022, 0x780b); /* AMD Hudson */ + if (!smbus_dev) { + msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n"); + return ERROR_NONFATAL; + } } /* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */ |