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| author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-05-02 20:07:57 +0000 |
|---|---|---|
| committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-05-02 20:07:57 +0000 |
| commit | 3ac5006efdd8f95140b8a54c6d52dcdfa17f529d (patch) | |
| tree | 55b505536275b0dd615f1c20dfafd505ca8ccddf /sfdp.c | |
| parent | 538b0c42765c3d51888a87a25190534ab4c0cbf3 (diff) | |
| download | flashrom-3ac5006efdd8f95140b8a54c6d52dcdfa17f529d.tar.gz | |
Tag all EWSR chips correctly.
All SPI chips without a WRSR feature bit set were evaluated except the
Sanyo LF25FW203A for which no datasheet is available.
The following list includes all SPI-capable chips that still have no
WRSR feature bit set:
- AT26DF041
- AT45CS1282
- AT45DB011D
- AT45DB021D
- AT45DB041D
- AT45DB081D
- AT45DB161D
- AT45DB321C
- AT45DB321D
- AT45DB642D
All of them have no write function set and can be therefore ignored
for now.
Apart from those the generic chips are also not tagged. The opaque
flash interface should not be affected. The SFDP dummy chip is
changed to explicitly set EWSR if it can't deduce it dynamically.
The vendor detecting generic chips can't write anyway.
Signed-off-by: Steven Zakulec <spzakulec@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1527 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'sfdp.c')
| -rw-r--r-- | sfdp.c | 4 |
1 files changed, 3 insertions, 1 deletions
@@ -176,10 +176,12 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len) flash->feature_bits = FEATURE_WRSR_EWSR; msg_cdbg2("EWSR (0x50).\n"); } - } else + } else { msg_cdbg2("non-volatile and the standard does not allow " "vendors to tell us whether EWSR/WREN is needed for " "status register writes - assuming EWSR.\n"); + flash->feature_bits = FEATURE_WRSR_EWSR; + } msg_cdbg2(" Write chunk size is "); if (tmp32 & (1 << 2)) { |