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author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-06-20 11:02:33 +0000 |
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committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-06-20 11:02:33 +0000 |
commit | 06376787c39a939cd1abfa924abd812a8c3ac303 (patch) | |
tree | 7e0d39872f7c96eec1cc3be521eb99b33ac91fd2 /spi25.c | |
parent | 9a74a84aa4ee8f4ce7329e902df61c22a2c512d5 (diff) | |
download | flashrom-06376787c39a939cd1abfa924abd812a8c3ac303.tar.gz |
The SPI opcode 0xd8 is not a chip erase opcode on any chip out there.
Besides that, the function as implemented just walks the chip and
ignores sector sizes.
Sector erase with SPI opcode 0xd8 is of course still supported.
Kill a declaration for a nonexisting function while we're at it.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi25.c')
-rw-r--r-- | spi25.c | 23 |
1 files changed, 0 insertions, 23 deletions
@@ -646,29 +646,6 @@ int spi_block_erase_d7(struct flashchip *flash, unsigned int addr, unsigned int return 0; } -int spi_chip_erase_d8(struct flashchip *flash) -{ - int i, rc = 0; - int total_size = flash->total_size * 1024; - int erase_size = 64 * 1024; - - spi_disable_blockprotect(); - - msg_cinfo("Erasing chip: \n"); - - for (i = 0; i < total_size / erase_size; i++) { - rc = spi_block_erase_d8(flash, i * erase_size, erase_size); - if (rc) { - msg_cerr("Error erasing block at 0x%x\n", i); - break; - } - } - - msg_cinfo("\n"); - - return rc; -} - /* Sector size is usually 4k, though Macronix eliteflash has 64k */ int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { |