diff options
| author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2013-06-28 21:29:51 +0000 |
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| committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2013-06-28 21:29:51 +0000 |
| commit | 06f8b0ef52d6c67d465dd2838ead3822b101a00f (patch) | |
| tree | 4fb4121d32185587067e5d50723ec879d56b8dbe /spi25_statusreg.c | |
| parent | f4de9a73e4f015efcf24b798c2bc094f8034df57 (diff) | |
| download | flashrom-06f8b0ef52d6c67d465dd2838ead3822b101a00f.tar.gz | |
Add support for remaining Numonyx (Micron) N25Q chips.
Add...
- N25Q128..3E
- N25Q128..1E
- N25Q256..1E (defunct due to addressing)
- N25Q256..3E (defunct due to addressing)
- N25Q512..1E (defunct due to addressing)
- N25Q512..3E (defunct due to addressing)
- N25Q00A..3G (defunct due to addressing)
Also, refine existing family members.
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi25_statusreg.c')
| -rw-r--r-- | spi25_statusreg.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/spi25_statusreg.c b/spi25_statusreg.c index 09fa057..107bacd 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -607,6 +607,28 @@ int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash) /* === Intel/Numonyx/Micron - Spansion === */ +int spi_disable_blockprotect_n25q(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x5C, 1 << 7, 0, 0xFF); +} + +int spi_prettyprint_status_register_n25q(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + if (flash->chip->total_size <= 32 / 8 * 1024) /* N25Q16 and N25Q32: reserved */ + spi_prettyprint_status_register_bit(status, 6); + else + msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n", + (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top"); + spi_prettyprint_status_register_bp(status, 2); + spi_prettyprint_status_register_welwip(status); + return 0; +} + /* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */ /* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */ int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash) |