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authorstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2015-11-22 02:23:31 +0000
committerstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2015-11-22 02:23:31 +0000
commitbae59c9b0efaa24c778533c9c18b68faa0a0c53e (patch)
treea3b5a06e4e58d208ecf22c956cd8c160b4d52ebc /spi25_statusreg.c
parentc3a2b29bea0e161ee8c45b8dfec86dce33dae824 (diff)
downloadflashrom-bae59c9b0efaa24c778533c9c18b68faa0a0c53e.tar.gz
Add support for SST SST25WF020A, SST25WF040B, SST25WF080B.
Apart from the strange ID (using Sanyo's vendor ID 0x62) the main difference from the plain SST25WF series is that they lack op codes 0xAD (AAI Word program) and 0x52 (32K erase). The smallest version does not support dual I/O operations either. SST25WF080B was tested under Linux with spidev. Tested-by: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi25_statusreg.c')
-rw-r--r--spi25_statusreg.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/spi25_statusreg.c b/spi25_statusreg.c
index bf63fb3..01a6862 100644
--- a/spi25_statusreg.c
+++ b/spi25_statusreg.c
@@ -374,6 +374,19 @@ int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash)
return 0;
}
+int spi_prettyprint_status_register_bp2_tb_bpl(struct flashctx *flash)
+{
+ uint8_t status = spi_read_status_register(flash);
+ spi_prettyprint_status_register_hex(status);
+
+ spi_prettyprint_status_register_bpl(status);
+ spi_prettyprint_status_register_bit(status, 6);
+ msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
+ spi_prettyprint_status_register_bp(status, 2);
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
/* === Amic ===
* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
* spi_prettyprint_status_register_bp1_srwd or