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| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-06-04 19:05:39 +0000 |
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| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-06-04 19:05:39 +0000 |
| commit | fffe1e2de1e5f8251ed77dae5953a69ce54186f5 (patch) | |
| tree | ac20b472a8408769c2a9956b28a2ea72fcc4b469 /sst28sf040.c | |
| parent | 7a845941e8757f2b14e0125c55d881150d4e3c5c (diff) | |
| download | flashrom-fffe1e2de1e5f8251ed77dae5953a69ce54186f5.tar.gz | |
The internal programmer needs correct information about flash_base and
chip window top/bottom alignment on non-x86 before it can be used.
Abort any internal programmer action for now until the code is fixed.
Add the concept of a processor enable for systems where flashing is
impacted by processor settings or processor model.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'sst28sf040.c')
0 files changed, 0 insertions, 0 deletions