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authorstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2014-08-20 15:39:38 +0000
committerstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2014-08-20 15:39:38 +0000
commit13729d260dee78803b2e4b4e532daad2a245f9dc (patch)
tree53fbf8653802401b1a35a6046aa8c54e0f8b0d1a /util
parent526905c27f01f5f30a7a60107c028b57bbadef32 (diff)
downloadflashrom-13729d260dee78803b2e4b4e532daad2a245f9dc.tar.gz
Add support for Intel Wildcat Point PCH.
The Wildcat Point PCH can be paired with Broadwell or Haswell. This patch was essentially backported from ChromiumOS commit 9bd2af8. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util')
-rw-r--r--util/ich_descriptors_tool/ich_descriptors_tool.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c
index 78cb15b..b6c1b12 100644
--- a/util/ich_descriptors_tool/ich_descriptors_tool.c
+++ b/util/ich_descriptors_tool/ich_descriptors_tool.c
@@ -123,6 +123,7 @@ static void usage(char *argv[], char *error)
"\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n"
"\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n"
"\t- \"8\" or \"lynx\" for Intel's 8 series chipsets.\n"
+"\t- \"9\" or \"wildcat\" for Intel's 9 series chipsets.\n"
"If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n"
"the GbE blob that is required to initialize the GbE are also dumped to files.\n",
argv[0], argv[0]);
@@ -205,6 +206,9 @@ int main(int argc, char *argv[])
cs = CHIPSET_8_SERIES_LYNX_POINT;
else if ((strcmp(csn, "silvermont") == 0))
cs = CHIPSET_BAYTRAIL;
+ else if ((strcmp(csn, "9") == 0) ||
+ (strcmp(csn, "wildcat") == 0))
+ cs = CHIPSET_9_SERIES_WILDCAT_POINT;
}
ret = read_ich_descriptors_from_dump(buf, len, &desc);