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authormkarcher <mkarcher@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2011-05-11 17:07:07 +0000
committermkarcher <mkarcher@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2011-05-11 17:07:07 +0000
commit5de0d1e9392bde4665ddb6cd216400e832b8178c (patch)
tree8b556f82073e824bc1e9a4cc9547d67b1d902cee /wbsio_spi.c
parentb23440053e8b3f8fcd0e97f0dbdfb84bed0bbc5f (diff)
downloadflashrom-5de0d1e9392bde4665ddb6cd216400e832b8178c.tar.gz
kill central list of SPI programmers
Remove the array spi_programmer, replace it by dynamic registration instead. Also initially start with no busses supported, and switch to the default non-SPI only for the internal programmer. Also this patch changes the initialization for the buses_supported variable from "everything-except-SPI" to "nothing". All programmers have to set the bus type on their own, and this enables register_spi_programmer to just add the SPI both for on-board SPI interfaces (where the internal programmer already detected the other bus types), as well as for external programmers (where we have the default "none"). Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'wbsio_spi.c')
-rw-r--r--wbsio_spi.c21
1 files changed, 17 insertions, 4 deletions
diff --git a/wbsio_spi.c b/wbsio_spi.c
index acf9cb2..7889f91 100644
--- a/wbsio_spi.c
+++ b/wbsio_spi.c
@@ -60,6 +60,20 @@ done:
return flashport;
}
+static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
+static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+
+static const struct spi_programmer spi_programmer_wbsio = {
+ .type = SPI_CONTROLLER_WBSIO,
+ .max_data_read = MAX_DATA_UNSPECIFIED,
+ .max_data_write = MAX_DATA_UNSPECIFIED,
+ .command = wbsio_spi_send_command,
+ .multicommand = default_spi_send_multicommand,
+ .read = wbsio_spi_read,
+ .write_256 = spi_chip_write_1,
+};
+
int wbsio_check_for_spi(void)
{
if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT1)))
@@ -68,8 +82,7 @@ int wbsio_check_for_spi(void)
msg_pspew("\nwbsio_spibase = 0x%x\n", wbsio_spibase);
- buses_supported |= CHIP_BUSTYPE_SPI;
- spi_controller = SPI_CONTROLLER_WBSIO;
+ register_spi_programmer(&spi_programmer_wbsio);
msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is "
"1024 KB!\n", __func__);
max_rom_decode.spi = 1024 * 1024;
@@ -97,7 +110,7 @@ int wbsio_check_for_spi(void)
* Would one more byte of RAM in the chip (to get all 24 bits) really make
* such a big difference?
*/
-int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr)
{
int i;
@@ -181,7 +194,7 @@ int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
return 0;
}
-int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
+static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
{
return read_memmapped(flash, buf, start, len);
}