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* Fix chip size limiting in atapromisehailfinger2016-02-181-24/+21
| | | | | | | | | | | | | | | | | The current code is checking model_id to remember if a chip has already been limited, but if flashchips.c contains two subsequent chips with different vendor_id but identical model_id the adjustment will not be done. Switch to checking the chip size instead. If a chip has multiple whole-chip erase functions, only one will be modified. Fix that. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Joseph C. Lehner <joseph.c.lehner@gmail.com> Acked-by: Urja Rannikko <urjaman@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add atapromise programmerhailfinger2016-01-161-0/+177
Supported controllers are Promise PDC20262 (FastTrak66/Ultra66), PDC20265 (FastTrak100 Lite/Ultra100), PDC20267 (FastTrak100/Ultra100). At least the Ultra100 only has address lines A0-A14 wired up, limiting addressable chip size to 32 kB. The flash chips mounted on those controllers usually is 128 kB, i.e. parts of the flash chip are inaccessible. As a workaround, the driver implicitly truncates the size of all flash chips to 32 kB. Works well for the factory installed flash. Do NOT use as a generic programmer for chips >32 kB. Signed-off-by: Joseph C. Lehner <joseph.c.lehner@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Urja Rannikko <urjaman@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1