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* Add SPI mode diagnostics for all post-MCP55 (nForce 5) chipsets fromhailfinger2010-02-131-1/+137
* Add Intel NM10 chipset enable.hailfinger2010-01-191-0/+1
* Don't use "byte" as identifier.mkarcher2010-01-121-11/+11
* Chipset: Fix sis5x0 register write verification.libv2010-01-101-13/+3
* Fix Intel FWH decode sizemkarcher2010-01-031-2/+2
* Add VIA VT8233A identification, mark as tested.hailfinger2009-12-231-0/+1
* Chipset/Board: vt8237: Set All mem cycles to LPC in chipset enable.libv2009-12-231-0/+7
* Chipset: Add support for Intel Poulsbo chipset.libv2009-12-211-0/+22
* Use the maximum decode size infrastructure.hailfinger2009-12-171-27/+96
* Internal (onboard) programming was the only feature which could not behailfinger2009-12-131-21/+0
* Chipset: remove sis630 chipset enable for sis540.libv2009-12-091-51/+17
* Intel PIIX* chipsets only support parallel flash (no LPC/FWH/SPI).uwe2009-12-081-0/+2
* Add support for Intel 3400 series / 5 series chipset.hailfinger2009-11-261-0/+3
* Mark Elitegroup K7S5A as supported.hailfinger2009-11-151-28/+28
* Add support for every single SiS chipset out there.hailfinger2009-11-151-67/+200
* Add infrastructure to check and report to the user the maximum supportedhailfinger2009-10-311-0/+11
* Mark NVIDIA Nforce4/MCP04 as tested.libv2009-10-061-1/+1
* Chipset support for the nVidia nForce 4.libv2009-10-051-0/+1
* Add chipset support for VIA VT82C596 by adding a PCI ID (trivial).uwe2009-09-251-0/+1
* Enable flashrom on Wyse Winterm S50.hailfinger2009-09-231-0/+1
* Use correct name for SB700/SB710/SB750 instead of calling them SB700.hailfinger2009-09-011-1/+1
* Anne Le Coq <annyvonne.le_coq@alcatel-lucent.fr> reported that flashromhailfinger2009-08-211-0/+1
* Allow the user to override FWH IDSEL on ICH6 and later.hailfinger2009-08-131-0/+14
* Fix up MSR handling in flashrom to support more OSes than Linux. stepan2009-08-121-69/+13
* Make debug messages printf_debug(). stepan2009-08-111-15/+15
* Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decodehailfinger2009-08-101-0/+36
* Remove unnecessary #include files.hailfinger2009-08-091-2/+1
* This is a workaround for a bug in SB600 and SB700. If we only send anhailfinger2009-07-231-7/+31
* Random minor flashrom fixes:uwe2009-06-281-1/+1
* Print the bus type(s) of both chipset and chip in the flashromuwe2009-06-281-0/+2
* Chipset enable for VIA VT8233.hailfinger2009-06-181-0/+1
* Move all printing code to print.c.uwe2009-06-171-26/+0
* List the size (in KB) and type of supported flash chips in 'flashrom -L'.uwe2009-06-161-3/+6
* The VIA VX800 chipset works with the VT8237S code after adding anuwe2009-06-151-0/+1
* Mark the 10b7:9058 3COM card (3C905B: Cyclone 10/100/BNC) as "OK", forgotuwe2009-06-021-6/+6
* Only probe for chips with compatible bus protocols.hailfinger2009-06-011-6/+17
* Add bus type annotation to struct flashchips. Right now, the annotationhailfinger2009-05-311-10/+9
* Add NForce2 chipset enable.libv2009-05-261-0/+14
* A bunch of output beautifications and improvements, as well as docoxygene2009-05-221-10/+16
* Use accessor functions for MMIO. Some MMIO accesses used volatile,hailfinger2009-05-171-35/+35
* List all boards which are:uwe2009-05-161-19/+17
* Drop unused/duplicated #includes and some dead code (trivial).uwe2009-05-161-3/+0
* Uwe tested the recent SB600 SPI commit and notified me of one unexpectedhailfinger2009-05-151-1/+25
* Create a SB600 SPI detection heuristic.hailfinger2009-05-101-1/+38
* Make chipset list alphabetically ordered as the other lists.uwe2009-05-081-39/+40
* Store and display chipset test status (not only chip status).uwe2009-05-071-83/+91
* Clarify error message in enable_flash_sb600() a little.stuge2009-05-061-1/+1
* Revert r466 because it introduced a bug:hailfinger2009-05-061-5/+6
* Cleanup redundant condition and clarify message a little.stuge2009-05-061-6/+5
* Touch up some error messages in enable_flash_cs5536().stuge2009-05-061-2/+2
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