| Commit message (Collapse) | Author | Age | Files | Lines |
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Use names for the commands and request types instead of magic
numbers and remove some of the unnecessary unexplained arguments.
Also, cleanup the nonsense code left over from RE. Most of it can
not be explained by official documentation and was recorded with
ancient firmware/software.
Based on the following chromiumos changes:
Change-Id: I80a0dcdf40eedc89da48fb2c54cd9d9fd13e6fa1
Change-Id: If61bac2c8194b3ec30a80422d871842c66f0cd74
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: David Hendricks <dhendrix@chromium.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Previously we have used low-active macros (because the hardware and
old protocol were so too) and set every single LED explicitly although we
only used a limited number of combinations. Using an enumeration for
commonly used values instead makes things easier.
Based on the following chromiumos change:
Change-Id: Ie481a583e623cdc45e3649a4db69b15570f65a7b
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: David Hendricks <dhendrix@chromium.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1894 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- AOpen UK79G-1394 (used in EZ18 barebones)
Reported by Lawrence Gough
- ASUS M4N78 SE
Reported by Dima Veselov
- ASUS P5LD2-VM
Mark board enable as tested (reported by Dima Veselov)
- GIGABYTE GA-970A-UD3P (rev. 2.0)
Reported by trucmar on IRC
- GIGABYTE GA-990FXA-UD3 (rev. 4.0)
Reported by ROKO__ on IRC
- GIGABYTE GA-H77-DS3H (rev. 1.1)
Reported by Evgeniy Edigarev
- GIGABYTE GA-P55-USB3 (rev. 2.0)
Reported by Måns Thörnqvist
- MSI MS-7817 (H81M-E33)
Reported by Igor Kolker
Chipsets:
- Marked Intel Bay Trail (0x0f1c) as tested OK
Reported by Antonio Ospite
- Refine Intel IDs
* Add IDs for Braswell
* Add IDs for 9 Series PCHs (e.g. H97, Z97)
* Rename Wellsburg devices slightly
Flash chips:
- Atmel AT25DF041A to PREW (+PREW)
Reported by Tai-hwa Liang
- Atmel AT26DF161 to PREW (+EW)
Reported by Steve Shenton
- Atmel AT45DB011D to PREW (+PREW)
Reported by The Raven
- Atmel AT45DB642D to PREW (+PREW)
Reported by Mahesh Mokal
- Eon EN25F32 to PREW (+PREW)
Reported by Arman Khodabande
- Eon EN25F40 to PREW (+REW)
Reported by Jerrad Pierce
- Eon EN25QH16 to PREW (+EW)
Reported by Ben Johnson
- GigaDevice GD25Q20(B) to PREW (+PREW)
Reported by Gilles Aurejac
- Macronix MX25U6435E/F to PR (+PR)
Reported by Matt Taggart
- PMC Pm25LV512(A) to PREW (+PREW)
Reported by The Raven
- SST SST39VF020 to PREW (+PREW)
Reported by Urja Rannikko
- Winbond W25Q40.V to PREW (+EW)
Reported by Torben Nielsen
- Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E).
- Add MX25L6465E variant.
- There was never a MX25L12805 AFAICT.
- Split MX25L12805 from models with the same ID but an additional 32 kB
eraser: MX25L12835F/MX25L12845E/MX25L12865E.
- Add a bunch of ST parallel NOR flash chip IDs.
Miscellaneous:
- Whitelist ThinkPad X200.
- Constify master parameter of register_master().
- Remove FEATURE_BYTEWRITES because it was never used at all.
- Refine hwseq messages and make them less prominent.
- Fix the yet unused PRIxCHIPADDR format string thingy.
- Fix copy&paste error in spi_prettyprint_status_register_bp().
Spotted by Pablo Cases.
- Add an additional SMBus controller revision to identify another Yangtze
model. Thanks to Dan Christensen for reporting this issue.
- dediprog: add missing include for stdlib.h.
This fixes (at least) building on FreeBSD and DragonflyBSD with gcc.
- Remove references to struct pci_filter from programmer.h.
It is only needed in internal.c where it has a complete type. Having
it in programmer.h provokes a warning by some old versions of gcc.
- Tiny other stuff.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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libusb-win32 is using a different header file name (lusb0_usb.h) for
a while. Use that on Windows builds to make clear that this is
currently the correct header to include.
Hopefully this will change soonish by migrating away from libusb-0.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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register_programmer suggests that we register a programmer. However,
that function registers a master for a given bus type, and a programmer
may support multiple masters (e.g. SPI, FWH). Rename a few other
functions to be more consistent.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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I forgot doing so in r1789 which broke compiling the dediprog module with
-Werror (which is default). Thanks to Mike Hibbett for reporting this.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Avoid setting SPI speed on firmware versions < 5.0.0 and note this
limitation in the man page.
Use the correct offset of the "12M" element in the spispeeds array to
match our manpage and the default of Dediprog's dpcmd.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1674 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Thanks to the traces captured and tests done by Martin Roth, and confirmed
by tests and analysis by Joshua Zarr too, we can now use both target chips
on the Dediprog SF100.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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control the transfer rate on the spi bus. The following rates are
available (in Hz):
375k, 750k, 1.5M, 2.18M, 3M, 8M, 12M and 24M
The original driver reinitializes the programmer after setting the
speed, so the initialization calls have moved into a new function
dediprog_setup() which is called twice.
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested Mainboards:
OK:
- Acer V75-M (used in IBM Aptiva 2170-G
http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html
- ASRock 4CoreDual-VSTA with W39V040FB
http://paste.flashrom.org/view.php?id=1446
- ASRock 775Dual-VSTA
http://www.flashrom.org/pipermail/flashrom/2012-December/010294.html
- ASRock E350M1/USB3
http://paste.flashrom.org/view.php?id=1465
- ASUS P5B-VM
http://www.flashrom.org/pipermail/flashrom/2012-December/010351.html
- ASUS SABERTOOTH 990FX R2.0
http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html
- Elitegroup A928 (including a laptop whitelist board enable)
http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html
- EVGA 122-CK-NF68
Reported by Stephanie Daugherty on IRC
http://paste.flashrom.org/view.php?id=1431
- GIGABYTE GA-A75M-UD2H
Reported by Soul_keeper on IRC
http://paste.flashrom.org/view.php?id=1490
- Intel D945GCNL
Add board enable to override laptop detection too.
http://www.flashrom.org/pipermail/flashrom/2012-December/010276.html
- MSI G33M (MS-7357)
http://www.flashrom.org/pipermail/flashrom/2012-October/010056.html
- Shuttle FB61
http://www.flashrom.org/pipermail/flashrom/2012-November/010105.html
- Tyan S4882 (Thunder K8QS Pro)
Reported on IRC
NOT OK:
Alienware Aurora-R2
http://www.flashrom.org/pipermail/flashrom/2012-December/010225.html
Biostar H61MU3
http://www.flashrom.org/pipermail/flashrom/2012-November/010144.html
Dell OptiPlex 7010
http://paste.flashrom.org/view.php?id=1481
Intel DH67CL
http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html
Supermicro X9DRT-HF+
http://www.flashrom.org/pipermail/flashrom/2012-November/010155.html
Supermicro X9DRW
http://www.flashrom.org/pipermail/flashrom/2012-November/010150.html
Tested flash chips:
- Atmel AT25FS010 to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1484
- Eon EN25F64 to PREW (+EW)
http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html
- Spansion S25FL032A/P to PREW (+EW)
http://paste.flashrom.org/view.php?id=1510
- ST M29F002T/NT to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html
- Winbond W25X10 to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1486
Tested chipsets:
- NVIDIA MCP78S http://www.flashrom.org/pipermail/flashrom/2012-November/010176.html
- SiS 650 http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html
Miscellaneous:
- Typo in GA-X58A-UDR3 (correct is GA-X58A-UD3R).
- Force 2-digit hex numbers in prints were it makes sense.
- Share code between enable_flash_sis530() and enable_flash_sis540().
- Some SST 25 series chips support both WRSR enable commands...
- S25FL032A and S25FL064A share the IDs with their P versions, so rename them.
- Fix a few memleaks in serprog.
- Dediprog uses UINT_MAX so include limits.h (fixes the Windows build of dediprog)
- Add (another) hint regarding the mandatory -p parameter to the manpage
to make Debian bug #690478 happy.
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=690478
- Fix whitespace issues.
- On shutdown, reset count of registered programmers (by Nico Huber)
- Fix atahpt.c shutdown.
The order of pcidev_init, register_shutdown and rpci_write_* is important!
Thanks to Roy for reporting the problem and testing the fix.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1640 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch adds a "device" parameter for Dediprog which enables use of
multiple dediprogs connected to a single machine. Very handy for test racks.
Example usage:
flashrom -p dediprog:device=0
flashrom -p dediprog:device=1
etc...
The patch was originally written by Nathan Laredo.
Thanks to David Hendricks for submitting it upstream.
Additional error handling, man page etc. by Stefan Tauner.
Signed-off-by: Nathan Laredo <nil@google.com>
Signed-off-by: David Hendricks <dhendrix@google.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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All the driver conversion work and cleanup has been done by Stefan.
flashrom.c and cli_classic.c are a joint work of Stefan and Carl-Daniel.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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To tell the programmer how to handle the data on the spi bus, a flag in
the fourth byte sent with the usb command is used. The second word was
mistaken for the size of the chunks sent over usb earlier. The third
byte (first of the second word) is now set to zero. This also adds some
checks for the size of data chunks sent over usb.
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Some investigations have shown that the original dediprog driver waits
about 200ms after setting voltage up and before setting voltage down.
This patch adds those delays. It helps flash chips to come up in time.
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Currently spi_aai_write() is implemented without an abstraction
mechanism for the programmer driver. This adds another function
pointer 'write_aai' to struct spi_programmer, which is set to
default_spi_write_aai (renamed spi_aai_write) for all programmers
for now.
A patch which utilises this abstraction in the dediprog driver will
follow.
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- ABIT A-S78H
http://www.flashrom.org/pipermail/flashrom/2012-January/008603.html
- ASRock AM2NF6G-VSTA
http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html
- ASUS KFSN4-DRE/SAS
reported by ted on IRC
- ASUS M2A-VM (HDMI variant)
http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html
- ASUS M4N78 PRO
http://www.flashrom.org/pipermail/flashrom/2012-January/008598.html
- ASUS P5K-V
http://www.flashrom.org/pipermail/flashrom/2012-February/008737.html
- ASUS P5KPL-CM
http://www.flashrom.org/pipermail/flashrom/2012-January/008522.html
- ASUS P5N7A-VM
http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html
- ASUS P5QPL-AM
http://www.flashrom.org/pipermail/flashrom/2012-January/008557.html
- ECS GF7100PVT-M3
http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html
- ECS K7SEM
http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html
- ECS P4M800PRO-M V2.0
http://www.flashrom.org/pipermail/flashrom/2012-January/008478.html
- Gigabyte 880GMA-USB3
http://www.flashrom.org/pipermail/flashrom/2012-February/008715.html
- Gigabyte GA-EP31-DS3L
http://www.flashrom.org/pipermail/flashrom/2012-January/008601.html
- Gigabyte GA-X58A-UDR3
http://www.flashrom.org/pipermail/flashrom/2012-January/008572.html
- Gigabyte GA-Z68XP-UD3
http://paste.flashrom.org/view.php?id=1058
- HP ProLiant N40L
http://www.flashrom.org/pipermail/flashrom/2012-February/008650.html
- MSI MS-7309 (K9N6PGM2-V2)
http://www.flashrom.org/pipermail/flashrom/2011-December/008441.html
- MSI MS-7548 (Aspen-GL8E used in HP Pavilion a6750f)
http://www.flashrom.org/pipermail/flashrom/2012-February/008666.html
- MSI MS-7676 (H67MA-ED55(B3))
http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html
- PC Engines Alix.6f2
Reported by Philip Prindeville on IRC
- Shuttle AV18E2
http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html
- Supermicro X8DTE-F
http://www.flashrom.org/pipermail/flashrom/2011-November/008304.html
- Supermicro X8DTT-HIBQF
http://www.flashrom.org/pipermail/flashrom/2012-January/008520.html
NOT OK:
- ASUS P8H61-M LE/USB3
http://www.flashrom.org/pipermail/flashrom/2012-January/008491.html
- ASUS P8H67-M PRO
http://www.flashrom.org/pipermail/flashrom/2011-December/008321.html
- ASUS P8Z68-V PRO
http://www.flashrom.org/pipermail/flashrom/2012-January/008469.html
- Clevo P150HM (laptop)
http://www.flashrom.org/pipermail/flashrom/2012-February/008717.html
- Intel D425KT
http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html
- Supermicro X9SCA-F
http://www.flashrom.org/pipermail/flashrom/2011-December/008313.html
Tested flash chips:
- mark AT29C512 as TEST_OK_PREW
http://paste.flashrom.org/view.php?id=977
- mark M25P40 as TEST_OK_PREW
http://www.flashrom.org/pipermail/flashrom/2011-December/008351.html
- mark M25PE80 as TEST_OK_PREW
http://paste.flashrom.org/view.php?id=1061
- mark MX25L6405 as TEST_OK_PREW
tested myself with an MX25L6436E variant on serprog
- mark W39V080A as TEST_OK_PREW
http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html
Tested chipsets:
- SiS 730 (:0730)
http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html
- NVIDIA MCP61 (:03e0)
http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html
- NVIDIA MCP73 (:07d7)
http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html
- NVIDIA MCP79 (:0aac)
http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html
- VIA VT82C69x (0691) and VT82C686A/B (:0686)
http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html
- AMD's SB950 (and presumably also SB920) have the same PCI ID as previous
generations, hence change the chipset enable device string. Thanks to
Christian Ruppert for the suggestion.
- Fix the board enable of the abit NF-M2 nView which had the IDs of its onboard
graphics card in its pattern. Change this to the LPC controller.
- Intel X79 SPI registers are identical to 6 Series', so use the chipsetenable
wrapper of it (enable_flash_pch6).
- Fix two paranoid checks for address < 0 in ichspi.c which became futile (and
generate clang warnings) with the unsignify patch committed in r1470.
- Rename AT25DF641 to AT25DF641(A). They are almost idencical, but could
be distinguished by an extended RDID probe (Atmel's patented EDI procedure),
which we do not support yet, hence handle them as one model for now.
- Source format fixes and typos
the addition of the ASRock AM2NF6G-VSTA to print.c is
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
everything else is
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1499 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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All chips which use spi_chip_write_256 should be written at native
speed. Chips using spi_chip_write_1 or spi_chip_write_aai will
still be slow.
Thanks to Steven A. Falco for testing with a ST/Numonyx M25P16.
Thanks to David Hendricks for testing with a Winbond W25Q64.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Steven A. Falco <sfalco@coincident.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1477 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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All programmer access function prototypes except init have been made
static and moved to the respective file.
A few internal functions in flash chip drivers had chipaddr parameters
which are no longer needed.
The lines touched by flashctx changes have been adjusted to 80 columns
except in header files.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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struct flashchip is used only for the flashchips array and for
operations which do not access hardware, e.g. printing a list of
supported flash chips.
struct flashctx (flash context) contains all data available in
struct flashchip, but it also contains runtime information like
mapping addresses. struct flashctx is expected to grow additional
members over time, a prime candidate being programmer info.
struct flashctx contains all of struct flashchip with identical
member layout, but struct flashctx has additional members at the end.
The separation between struct flashchip/flashctx shrinks the memory
requirement of the big flashchips array and allows future extension
of flashctx without having to worry about bloat.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Push those changes forward where needed to prevent new sign
conversion warnings where possible.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Mixing uninitialized and initialized local variables leads to
confusion.
- ft2232_spi error cases should have gotten some error handling, and
that's the reason the curly braces were there.
- Fixing typos/wording in some places would have been nice given that
those places were touched anyway.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1413 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also, indentation fixes, e.g. due to conversion to msg_*, use ARRAY_SIZE
where possible, wrap overly long line, etc.
Compile-tested. There should be no functional changes.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch attempts to resolve some programmer shutdown ordering issues
by having the programmer init functions register shutdown callbacks explicitly
wherever it makes most sense. Before, assumptions were made that could lead to
the internal programmer's state changing before the external programmer could be
shut down properly. Now, each programmer cleans up after itself and (hopefully)
performs each operation in the correct order.
As a side-effect, this patch gives us a better usage model for reverse
operations such as rpci_* and rmmio_*. In the long-run, this should make
reversing the initialization process easier to understand, less tedious, and
less error-prone.
In short, this patch does the following:
- Registers a shutdown callback during initialization for each programmer.
- Kills the .shutdown function pointer from programmer_entry struct. Also,
make most shutdown functions static.
- Adds a few minor clean-ups and corrections (e.g. missing physunmap() calls).
TODO: Remove forward declaration of serprog_shutdown() (added to simplify diff)
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Remove the array spi_programmer, replace it by dynamic registration
instead. Also initially start with no busses supported, and switch to
the default non-SPI only for the internal programmer.
Also this patch changes the initialization for the buses_supported variable
from "everything-except-SPI" to "nothing". All programmers have to set the
bus type on their own, and this enables register_spi_programmer to just add
the SPI both for on-board SPI interfaces (where the internal programmer
already detected the other bus types), as well as for external programmers
(where we have the default "none").
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Mathias Krause <mathias.krause@secunet.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1257 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Implement all Dediprog commands found in USB traces, even if their
purpose is not yet known.
Annotate unknown commands with info about the call sequence they are
embedded in and the firmware version of the log.
Add a new shutdown command for firmware 5.x (of which Stefan thinks it's
"switch the Pass light on" hence it is called late in the game)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <reinauer@google.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Please note that the write speedup only applies to chips which have SPI
page write (i.e. chips using spi_chip_write_256).
This is a quick fix for write speed until I get around to implementing
full bulk SPI write support.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Richard A. Smith <richard@laptop.org>
Acked-by: Mathias Krause <mathias.krause@secunet.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Should result in native speed for plain read and erase.
Should result in a measurable speedup for writes due to a fast verify.
Packet size is 512 bytes. Depending on your USB hardware and the
Dediprog firmware version, this may not work at all. That said, it
worked on the hardware we tested.
Add lots of error checking where it was missing before.
Thanks to Richard A. Smith, Mathias Krause and David Hendricks for
testing multiple iterations of this patch.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-By: Richard A. Smith <richard@laptop.org>
Acked-By: Mathias Krause <mathias.krause@secunet.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1234 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Allow any firmware version from 2.x.y to 5.x.y.
Handle errors for the initial USB command to catch -EPERM.
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1227 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add a generic voltage parameter parser.
Move tolower_string() from dummyflasher.c to flashrom.c to make it
available everywhere.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Programmer specific functions are of absolutely no interest to any file
except those dealing with programmer specific actions (special SPI
commands and the generic core).
The new header structure is as follows (and yes, improvements are
possible):
flashchips.h flash chip IDs
chipdrivers.h chip-specific read/write/... functions
flash.h common header for all stuff that doesn't fit elsewhere
hwaccess.h hardware access functions
programmer.h programmer specific functions
coreboot_tables.h header from coreboot, internal programmer only
spi.h SPI command definitions
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Constify variables where possible.
Initialize programmer-related variables explicitly in programmer_init to
allow running programmer_init from a clean state after
programmer_shutdown.
Prohibit registering programmer shutdown functions before init or after
shutdown.
Kill some dead code.
Rename global variables with namespace-polluting names.
Use a previously unused locking helper function in sst49lfxxxc.c.
This is needed for libflashrom.
Effects on the binary size of flashrom are minimal (300 bytes
shrinkage), but the data section shrinks by 4384 bytes, and that's a
good thing if flashrom is operating in constrained envionments.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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unistd.h was only used to get a definition of NULL in all files. Add our
own NULL #define and remove unistd.h from flash.h
stdio.h has no place in flash.h, it should be included only in files
which really need it.
Add #include statements in individual .c files where needed.
Replace a few printf with msg_* to eliminate the need for stdio.h.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1021 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Remove chipdriver.h include from flash.h
Some of the spi programmer drivers required chipdrivers.h, needs fixing later:
it87spi.c
ichspi.c
sb600spi.c
wbsio_spi.c
buspirate_spi.c
ft2232spi.c
bitbang_spi.c
dediprog.c
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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That's necessary to use bulk transfers, and just the
right thing in any case.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Speed up reads by a factor of 4 by switching block size from 4 to 16.
Add support for 4 byte RDID.
Add USB error decoding via usb_strerror.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Reverse engineered from USB logs. I never touched that programmer nor
did I ever see the associated software.
Disabled by default until it is complete. The driver needs to be hooked
up to the SPI core before it will do anything besides init and
diagnostics.
I successfully reverse engineered all commands, but some are still
somewhat magic.
Logs from "flashrom -p dediprog -V" are appreciated.
Probe and read should work, erase/write is expected to explode.
The programmer will set voltage to 0 on exit.
Thanks a lot to Stefan Reinauer and Patrick Georgi for providing USB
logs and for testing the result.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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