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* Add struct flashctx * parameter to all functions accessing flash chips.hailfinger2011-12-181-2/+8
| | | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Register Parallel/LPC/FWH programmers the same way SPI programmers are ↵hailfinger2011-11-091-2/+12
| | | | | | | | | | | | | | | | | | | | | registered. All programmers are now calling programmer registration functions and direct manipulations of buses_supported are not needed/possible anymore. Note: Programmers without parallel/LPC/FWH chip support should not call register_par_programmer(). Additional fixes: Set max_rom_decode.parallel for drkaiser. Remove abuse of programmer_map_flash_region in it85spi. Annotate several FIXMEs in it85spi. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-By: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a bunch of new/tested stuff and various small changes 7stefanct2011-09-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add Asus Crosshair IV Extreme to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-August/007640.html - add Biostar N68S3+ to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-September/007788.html - add P7H55-M LX to the list of supported boards although flashrom works correctly, it is marked as not ok, because flashing the vendor image will break the LAN interface. - add GA-X58A-UD7 to the list of supported boards http://paste.flashrom.org/view.php?id=739 - add Asus P4P800-VM to print.c (has a working board enable) - add Asus K8V-X to print.c reported by florz http://paste.flashrom.org/view.php?id=742 - add Intel D865GLC to print.c as non-working (ICH5 with BIOS lock enable) reported by jmd on IRC http://paste.flashrom.org/view.php?id=775 - add Intel DH67CF to print.c as non-working (H67 with BIOS lock enable and locked ME region) http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html - add ECS P4M800PRO-M (V1.0A) to the list of supported boards reported by dweg on IRC (hot flashed a SST49LF040B, original was W39V040B) - add X8DTU-6TF+ to print.c (needs ME unlocking) http://www.flashrom.org/pipermail/flashrom/2011-August/007553.html - add Shuttle FH67 (used in the SH67H3 barebone) to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-August/007749.html - add Tyan S2912 to the list of supported boards reported by erlan on IRC - add ZOTAC GeForce 8200 to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-August/007612.html - mark AT25DF321A as TEST_OK_PROBE http://www.flashrom.org/pipermail/flashrom/2011-August/007553.html - mark 28F001BN/BX-T as TEST_OK_PR http://www.flashrom.org/pipermail/flashrom/2011-July/007208.html - rename MX29F002 http://patchwork.coreboot.org/patch/2794/ - mark SST39SF040 as fully tested reported by Florian 'florz' Zumbiehl http://paste.flashrom.org/view.php?id=742 - mark SST49LF040B as fully tested reported by dweg on IRC and later by Armin on the ml: http://www.flashrom.org/pipermail/flashrom/2011-August/007764.html - mark H55 chipset as OK http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html - mark H67 chipset as OK http://www.flashrom.org/pipermail/flashrom/2011-August/007749.html - mark a MCP61 version as OK http://www.flashrom.org/pipermail/flashrom/2011-September/007788.html - add preliminary X79 (patsburg) PCI IDs 0x1d40 was reported already as working (not archived in our pipermail?) http://marc.info/?l=flashrom&m=130683026218257&w=2 - mark "82557/8/9/0/1 Ethernet Pro 100" in nicintel.c as working http://www.flashrom.org/pipermail/flashrom/2011-August/007480.html - rename some chips that had gratuitous "probing" suffixes: - SST25VF010.REMS - SST25VF040.REMS - M25P05.RES - M25P10.RES some other chip names with suffixes are needed due to lack of support for multiple probe functions per chip. this is explained here: http://www.flashrom.org/pipermail/flashrom/2011-August/007597.html - remove unneeded nicintel_spi-related function declarations in programmer.h - typos and whitespace fixes - fix Asus P4P800-E Deluxe detection The original board enable was added before DMI matching and used the IDs of a Promise controller as secondary PCI ID set. The controller could be disabled in the BIOS which would make the board not match. This patch uses the SMBus controller instead and adds a DMI pattern. This was Tested-by: Michael Schneider <vdrportal_midas at gmx dot de> - add "Sealed-case PC" to the list of chassis type (as indicating "not a laptop") This is Acked-by: Idwer Vollering <vidwer@gmail.com> the fix for the typo unusued -> unused is Signed-off-by: Sylvain "ythier" Hitier <sylvain.hitier@gmail.com> everything else is Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> And everything was reviewed and Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1425 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Rename CHIP_BUSTYPE_FOO to BUS_FOO.hailfinger2011-07-271-1/+1
| | | | | | | | | | It's shorter to type, and we have less problems with the 80 column limit. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Use shutdown callback mechanism to shutdown programmersdhendrix2011-06-141-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch attempts to resolve some programmer shutdown ordering issues by having the programmer init functions register shutdown callbacks explicitly wherever it makes most sense. Before, assumptions were made that could lead to the internal programmer's state changing before the external programmer could be shut down properly. Now, each programmer cleans up after itself and (hopefully) performs each operation in the correct order. As a side-effect, this patch gives us a better usage model for reverse operations such as rpci_* and rmmio_*. In the long-run, this should make reversing the initialization process easier to understand, less tedious, and less error-prone. In short, this patch does the following: - Registers a shutdown callback during initialization for each programmer. - Kills the .shutdown function pointer from programmer_entry struct. Also, make most shutdown functions static. - Adds a few minor clean-ups and corrections (e.g. missing physunmap() calls). TODO: Remove forward declaration of serprog_shutdown() (added to simplify diff) Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Intel NIC with parallel flash support.hailfinger2011-05-081-0/+109
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Anton Kochkov <anton.kochkov@gmail.com> Acked-by: Anton Kochkov <anton.kochkov@gmail.com> Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1297 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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