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* Refactor unlocking of many chips with locking at register space address +2.stefanct2014-08-031-107/+5
| | | | | | | | | | | This includes PMC Pm49*, SST 49LF00*, ST M50* and Winbond W39* families. The erase and write test status bits of all affected chips have been reset. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Winbond W39F010/W39L010/W39L020.stefanct2012-10-281-0/+57
| | | | | | | | | | | | | | | | W39F010 is a 128kB parallel 5V flash chip, 16k bootblocks. W39L010 is a 128kB parallel 3.3V flash chip, 8k bootblocks. W39L020 is a 256kB parallel 3.3V flash chip, 64k/16k bootblocks. The W39F010 code was tested with a satasii programmer. The first write attempt after an erase returned with verify failure, but the second write attempt was succesful: http://paste.flashrom.org/view.php?id=1418 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1620 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Make struct flashchip a field in struct flashctx instead of a complete copy.hailfinger2012-08-251-4/+4
| | | | | | | | | | | | | All the driver conversion work and cleanup has been done by Stefan. flashrom.c and cli_classic.c are a joint work of Stefan and Carl-Daniel. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for for the Atmel AT49F040 chip.uwe2012-04-151-0/+8
| | | | | | | | | | | | Chip features an optional permanent boot block write protection. Signed-off-by: David Borg <borg.db@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1522 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add struct flashctx * parameter to all functions accessing flash chips.hailfinger2011-12-181-11/+11
| | | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Use struct flashctx instead of struct flashchip for flash chip accesshailfinger2011-12-141-18/+18
| | | | | | | | | | | | | | | | | | | | | | | struct flashchip is used only for the flashchips array and for operations which do not access hardware, e.g. printing a list of supported flash chips. struct flashctx (flash context) contains all data available in struct flashchip, but it also contains runtime information like mapping addresses. struct flashctx is expected to grow additional members over time, a prime candidate being programmer info. struct flashctx contains all of struct flashchip with identical member layout, but struct flashctx has additional members at the end. The separation between struct flashchip/flashctx shrinks the memory requirement of the big flashchips array and allows future extension of flashctx without having to worry about bloat. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Unsignify lengths and addresses in chip functions and structsstefanct2011-11-231-6/+6
| | | | | | | | | | Push those changes forward where needed to prevent new sign conversion warnings where possible. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Remove unneeded inclusions of chipdrivers.hstefanct2011-08-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | this is related to the spi split patch as discussed in: http://www.flashrom.org/pipermail/flashrom/2010-February/thread.html#2364 the old commit (r914) log notes: "Some of the spi programmer drivers required chipdrivers.h, needs fixing later: it87spi.c ichspi.c sb600spi.c wbsio_spi.c buspirate_spi.c ft2232spi.c bitbang_spi.c dediprog.c" there still remain a few cases where chipdrivers.h is needed: dediprog.c (spi_read_chunked and spi_write_chunked) it87spi.c (due to spi_write_enable and spi_read_status_register) wbsio_spi.c (spi_programmer registration only) besides that, there are also non-spi files that do not need it. also, add flash.h to chipdrivers.h because it uses some types of it and remove flashchips.h from print.c Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1414 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* add a bunch of new/tested stuff and various small changes 5stefanct2011-07-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - mark EN25F80 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-July/007329.html - mark W25Q16 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-July/007151.html - mark W39V040A as fully tested http://www.flashrom.org/pipermail/flashrom/2011-July/007161.html - mark Pm25LV040 as fully tested reported by TL1 on IRC - mark W49F002U/N as fully tested http://paste.flashrom.org/view.php?id=733g - mark W39V080FA as fully tested http://www.flashrom.org/pipermail/flashrom/2011-July/007225.html - add ASUS P4S533-X to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007200.html - add ASUS M4A785TD-V EVO to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007329.html - add GA-945PL-S3P (rev. 6.6) to the list of supported boards reported by TL1 on IRC - add MS-7142 (K8MM-V) to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007161.html - add MS-7369 (K9N Neo V2) to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007181.html - add X7DBT-INF to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007225.html - mark SiS 645DX chipset enable as OK http://www.flashrom.org/pipermail/flashrom/2011-July/007200.html - mark SiS 651 chipset enable as OK http://paste.flashrom.org/view.php?id=733 - move intel_ich_gpio34_raise to the correct line(s) - change the output of unlock_w39_fwh_block from 0x%x to 0x%08x - fix output for untested chipset enables (missing space) - reorder the board enable in print.c entry for GA-8SIMLH added in r1385. - minor other fixes - fix output for multiple found flash chips by adding quotes and commas - similarly fix output of "Found/Assuming" chips Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> the last two points are Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> everything else is Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add W39L040mkarcher2011-03-061-0/+16
| | | | | | | Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* enable unlocking (erasing/writing) W39V040FB chipsmkarcher2010-12-261-0/+10
| | | | | | | | | | Add code for the unlocking (erasing/writing) of Winbond W39V040FB chips, enabling erasing/writing this type of chip. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1248 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Winbond W39V040FB and W39V040FC.hailfinger2010-12-051-0/+255
Print lock status for all supported Winbond W39* chips: W39V040A, W39V040B, W39V040C, W39V040FA, W39V040FB, W39V040FC, W39V080A, W39V080FA, W39V080FA (dual mode). Fill in correct probe timing for Winbond W39V040C and W39V080FA. Please note that the W39V040B/W39V040FB pair has identical IDs, identical read/write/erase, but locking differs. Same applies to W39V040C/W39V040FC. This causes double detection on chipsets which support LPC and FWH, making flashing more difficult because the user has to select the correct chip. This is called the evil twin problem. A better evil twin handling (patch available) will resolve that problem. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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