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author | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2012-05-17 08:03:51 +0000 |
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committer | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2012-05-17 08:03:51 +0000 |
commit | 2147f6f505a0568b7ce59d316479edecd3f4dbc9 (patch) | |
tree | 6288692bc69632d858e7283b5652d36c91704a14 /compiler/arm/cpubase.pas | |
parent | 92b0c6fdce0ce6148ac4ab38c6d38758d66c93ac (diff) | |
download | fpc-2147f6f505a0568b7ce59d316479edecd3f4dbc9.tar.gz |
* patch by Nico Erfurth:
Inline a couple of small functions of the ARM-Compiler
These small changes improved overall compile times of the fpc suite by
about 2-3% running on an 1.2GHz Kirkwood.
git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21312 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'compiler/arm/cpubase.pas')
-rw-r--r-- | compiler/arm/cpubase.pas | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/compiler/arm/cpubase.pas b/compiler/arm/cpubase.pas index 8ae08832cc..46ca1d2705 100644 --- a/compiler/arm/cpubase.pas +++ b/compiler/arm/cpubase.pas @@ -292,11 +292,11 @@ unit cpubase; PARENT_FRAMEPOINTER_OFFSET = 0; { Low part of 64bit return value } - function NR_FUNCTION_RESULT64_LOW_REG: tregister; - function RS_FUNCTION_RESULT64_LOW_REG: shortint; + function NR_FUNCTION_RESULT64_LOW_REG: tregister;{$ifdef USEINLINE}inline;{$endif USEINLINE} + function RS_FUNCTION_RESULT64_LOW_REG: shortint;{$ifdef USEINLINE}inline;{$endif USEINLINE} { High part of 64bit return value } - function NR_FUNCTION_RESULT64_HIGH_REG: tregister; - function RS_FUNCTION_RESULT64_HIGH_REG: shortint; + function NR_FUNCTION_RESULT64_HIGH_REG: tregister;{$ifdef USEINLINE}inline;{$endif USEINLINE} + function RS_FUNCTION_RESULT64_HIGH_REG: shortint;{$ifdef USEINLINE}inline;{$endif USEINLINE} {***************************************************************************** GCC /ABI linking information @@ -333,7 +333,7 @@ unit cpubase; { Returns the tcgsize corresponding with the size of reg.} function reg_cgsize(const reg: tregister) : tcgsize; function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister; - function is_calljmp(o:tasmop):boolean; + function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE} procedure inverse_flags(var f: TResFlags); function flags_to_cond(const f: TResFlags) : TAsmCond; function findreg_by_number(r:Tregister):tregisterindex; @@ -343,8 +343,8 @@ unit cpubase; function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE} function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE} - procedure shifterop_reset(var so : tshifterop); - function is_pc(const r : tregister) : boolean; + procedure shifterop_reset(var so : tshifterop); {$ifdef USEINLINE}inline;{$endif USEINLINE} + function is_pc(const r : tregister) : boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE} function is_shifter_const(d : aint;var imm_shift : byte) : boolean; function dwarf_reg(r:tregister):shortint; @@ -414,7 +414,7 @@ unit cpubase; end; - function is_calljmp(o:tasmop):boolean; + function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE} begin { This isn't 100% perfect because the arm allows jumps also by writing to PC=R15. To overcome this problem we simply forbid that FPC generates jumps by loading R15 } @@ -468,13 +468,13 @@ unit cpubase; end; - procedure shifterop_reset(var so : tshifterop); + procedure shifterop_reset(var so : tshifterop);{$ifdef USEINLINE}inline;{$endif USEINLINE} begin FillChar(so,sizeof(so),0); end; - function is_pc(const r : tregister) : boolean; + function is_pc(const r : tregister) : boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE} begin is_pc:=(r=NR_R15); end; @@ -497,7 +497,7 @@ unit cpubase; end; - function rotl(d : dword;b : byte) : dword; + function rotl(d : dword;b : byte) : dword; {$ifdef USEINLINE}inline;{$endif USEINLINE} begin result:=(d shr (32-b)) or (d shl b); end; @@ -543,7 +543,7 @@ unit cpubase; end; { Low part of 64bit return value } - function NR_FUNCTION_RESULT64_LOW_REG: tregister; + function NR_FUNCTION_RESULT64_LOW_REG: tregister; {$ifdef USEINLINE}inline;{$endif USEINLINE} begin if target_info.endian=endian_little then result:=NR_R0 @@ -551,7 +551,7 @@ unit cpubase; result:=NR_R1; end; - function RS_FUNCTION_RESULT64_LOW_REG: shortint; + function RS_FUNCTION_RESULT64_LOW_REG: shortint; {$ifdef USEINLINE}inline;{$endif USEINLINE} begin if target_info.endian=endian_little then result:=RS_R0 @@ -560,7 +560,7 @@ unit cpubase; end; { High part of 64bit return value } - function NR_FUNCTION_RESULT64_HIGH_REG: tregister; + function NR_FUNCTION_RESULT64_HIGH_REG: tregister; {$ifdef USEINLINE}inline;{$endif USEINLINE} begin if target_info.endian=endian_little then result:=NR_R1 @@ -568,7 +568,7 @@ unit cpubase; result:=NR_R0; end; - function RS_FUNCTION_RESULT64_HIGH_REG: shortint; + function RS_FUNCTION_RESULT64_HIGH_REG: shortint; {$ifdef USEINLINE}inline;{$endif USEINLINE} begin if target_info.endian=endian_little then result:=RS_R1 |