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| author | nickysn <nickysn@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2013-12-23 22:58:32 +0000 |
|---|---|---|
| committer | nickysn <nickysn@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2013-12-23 22:58:32 +0000 |
| commit | d38ab2bbeeb15a805ee43ccc7674ff0cfb737b9d (patch) | |
| tree | 64c40bbb45ac9feee151f7329d7084a9b92af5ef /compiler/cgutils.pas | |
| parent | acc07ed92ce6dcbf6aa4439e3dd88c86f45a237e (diff) | |
| download | fpc-d38ab2bbeeb15a805ee43ccc7674ff0cfb737b9d.tar.gz | |
* extracted the code from psub.translate_registers for generating the name of
the registers from a tlocation to a new function called location_reg2string
+ added support for 16-bit and 8-bit ALUs in location_reg2string
git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@26275 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'compiler/cgutils.pas')
| -rw-r--r-- | compiler/cgutils.pas | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/compiler/cgutils.pas b/compiler/cgutils.pas index a5fd081cc6..6fa3df88a0 100644 --- a/compiler/cgutils.pas +++ b/compiler/cgutils.pas @@ -174,6 +174,7 @@ unit cgutils; procedure location_reset_ref(var l : tlocation;lt:TCGRefLoc;lsize:TCGSize; alignment: longint); procedure location_copy(var destloc:tlocation; const sourceloc : tlocation); procedure location_swap(var destloc,sourceloc : tlocation); + function location_reg2string(const locreg: tlocation): string; { returns r with the given alignment } function setalignment(const r : treference;b : byte) : treference; @@ -271,5 +272,49 @@ uses end; + function location_reg2string(const locreg: tlocation): string; + begin + if not (locreg.loc in [LOC_REGISTER,LOC_CREGISTER, + LOC_MMXREGISTER,LOC_CMMXREGISTER, + LOC_MMREGISTER,LOC_CMMREGISTER, + LOC_FPUREGISTER,LOC_CFPUREGISTER]) then + internalerror(2013122301); + + if locreg.loc in [LOC_REGISTER,LOC_CREGISTER] then + begin + case locreg.size of +{$if defined(cpu64bitalu)} + OS_128,OS_S128: + result:=std_regname(locreg.registerhi)+':'+std_regname(locreg.register); +{$elseif defined(cpu32bitalu)} + OS_64,OS_S64: + result:=std_regname(locreg.registerhi)+':'+std_regname(locreg.register); +{$elseif defined(cpu16bitalu)} + OS_64,OS_S64: + result:=std_regname(GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register); + OS_32,OS_S32: + result:=std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register); +{$elseif defined(cpu8bitalu)} + OS_64,OS_S64: + result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.registerhi))))+':'+std_regname(GetNextReg(GetNextReg(locreg.registerhi)))+':'+GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)+':'+std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))+':'+std_regname(GetNextReg(GetNextReg(locreg.register)))+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register); + OS_32,OS_S32: + result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))+':'+std_regname(GetNextReg(GetNextReg(locreg.register)))+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register); + OS_16,OS_S16: + result:=std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register); +{$endif} + else + result:=std_regname(locreg.register); + end; + end + else + begin + if locreg.registerhi<>NR_NO then + result:=std_regname(locreg.registerhi)+':'+std_regname(locreg.register) + else + result:=std_regname(locreg.register); + end; + end; + + end. |