* GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved

  from cpubase unit to a method in the tcg class. The reason for doing that is
  that this is now a standard part of the 16-bit and 8-bit code generators and
  moving to the tcg class allows doing extra checks (not done yet, but for
  example, in the future, we can keep track of whether there was an extra
  register allocated with getintregister and halt with an internalerror in case
  GetNextReg() is called for registers, which weren't allocated as a part of a
  sequence, therefore catching a certain class of 8-bit and 16-bit code
  generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
  anything. It might be added to the tcg class, in case it's ever needed, but
  for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.

git-svn-id: https://svn.freepascal.org/svn/fpc/trunk@37180 3ad0048d-3df7-0310-abae-a5850022a9f2

1 files changed, 15 insertions, 14 deletions

diff --git a/compiler/cgutils.pas b/compiler/cgutils.pas
index e36642d8c5..124ca4016f 100644
--- a/compiler/cgutils.pas
+++ b/compiler/cgutils.pas
@@ -210,7 +210,8 @@ implementation
 
 uses
   systems,
-  verbose;
+  verbose,
+  cgobj;
 
 {****************************************************************************
                                   TReference
@@ -332,13 +333,13 @@ uses
                   result:='??:'+std_regname(locreg.registerhi)
                           +':??:'+std_regname(locreg.register)
                 else
-                  result:=std_regname(GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)
-                          +':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
+                  result:=std_regname(cg.GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)
+                          +':'+std_regname(cg.GetNextReg(locreg.register))+':'+std_regname(locreg.register);
               OS_32,OS_S32:
                 if getsupreg(locreg.register)<first_int_imreg then
                   result:='??:'+std_regname(locreg.register)
                 else
-                  result:=std_regname(GetNextReg(locreg.register))
+                  result:=std_regname(cg.GetNextReg(locreg.register))
                           +':'+std_regname(locreg.register);
 {$elseif defined(cpu8bitalu)}
               OS_64,OS_S64:
@@ -346,26 +347,26 @@ uses
                   result:='??:??:??:'+std_regname(locreg.registerhi)
                           +':??:??:??:'+std_regname(locreg.register)
                 else
-                  result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.registerhi))))
-                          +':'+std_regname(GetNextReg(GetNextReg(locreg.registerhi)))
-                          +':'+std_regname(GetNextReg(locreg.registerhi))
+                  result:=std_regname(cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(locreg.registerhi))))
+                          +':'+std_regname(cg.GetNextReg(cg.GetNextReg(locreg.registerhi)))
+                          +':'+std_regname(cg.GetNextReg(locreg.registerhi))
                           +':'+std_regname(locreg.registerhi)
-                          +':'+std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))
-                          +':'+std_regname(GetNextReg(GetNextReg(locreg.register)))
-                          +':'+std_regname(GetNextReg(locreg.register))
+                          +':'+std_regname(cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(locreg.register))))
+                          +':'+std_regname(cg.GetNextReg(cg.GetNextReg(locreg.register)))
+                          +':'+std_regname(cg.GetNextReg(locreg.register))
                           +':'+std_regname(locreg.register);
               OS_32,OS_S32:
                 if getsupreg(locreg.register)<first_int_imreg then
                   result:='??:??:??:'+std_regname(locreg.register)
                 else
-                  result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))
-                          +':'+std_regname(GetNextReg(GetNextReg(locreg.register)))
-                          +':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
+                  result:=std_regname(cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(locreg.register))))
+                          +':'+std_regname(cg.GetNextReg(cg.GetNextReg(locreg.register)))
+                          +':'+std_regname(cg.GetNextReg(locreg.register))+':'+std_regname(locreg.register);
               OS_16,OS_S16:
                 if getsupreg(locreg.register)<first_int_imreg then
                   result:='??:'+std_regname(locreg.register)
                 else
-                  result:=std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
+                  result:=std_regname(cg.GetNextReg(locreg.register))+':'+std_regname(locreg.register);
 {$endif}
               else
                 result:=std_regname(locreg.register);