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authoryury <yury@3ad0048d-3df7-0310-abae-a5850022a9f2>2020-08-17 09:25:45 +0000
committeryury <yury@3ad0048d-3df7-0310-abae-a5850022a9f2>2020-08-17 09:25:45 +0000
commit8803958c92c03fb9c5e52183966f7b17b6881985 (patch)
tree8264cdf18bec81c330935b423dcb8de91624f6e5 /compiler/nadd.pas
parent3366554dec543496f22c80b1b2363a5854337db2 (diff)
downloadfpc-8803958c92c03fb9c5e52183966f7b17b6881985.tar.gz
* In the TP mode for 16-bit CPUs uint8+uint8 is extended to sint16+sint16. This is TP compatible.
git-svn-id: https://svn.freepascal.org/svn/fpc/trunk@46468 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'compiler/nadd.pas')
-rw-r--r--compiler/nadd.pas4
1 files changed, 4 insertions, 0 deletions
diff --git a/compiler/nadd.pas b/compiler/nadd.pas
index 27f604188c..0bac5e4322 100644
--- a/compiler/nadd.pas
+++ b/compiler/nadd.pas
@@ -2263,10 +2263,14 @@ implementation
else
begin
{ When there is a signed type or there is a minus operation
+ or in TP mode for 16-bit CPUs
we convert to signed int. Otherwise (both are unsigned) we keep
the result also unsigned. This is compatible with Delphi (PFV) }
if is_signed(ld) or
is_signed(rd) or
+{$if defined(cpu16bitalu)}
+ (m_tp7 in current_settings.modeswitches) or
+{$endif}
(nodetype=subn) then
begin
inserttypeconv(right,sinttype);