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| author | jonas <jonas@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2012-05-13 12:33:10 +0000 |
|---|---|---|
| committer | jonas <jonas@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2012-05-13 12:33:10 +0000 |
| commit | 1949b0ae7a99a0a962f47cd0b3cb4ae1cd49e28a (patch) | |
| tree | 85385feefb7b55b015f354b565a8b65dc8e80acb /compiler/powerpc/nppcadd.pas | |
| parent | 85d6f98a942a3065649b449d5a8a965588350312 (diff) | |
| download | fpc-1949b0ae7a99a0a962f47cd0b3cb4ae1cd49e28a.tar.gz | |
* moved subsetref/reg and bit_set/test support from cgobj to hlcgobj for
future use by high level code generator targets
o this in turn required that all a_load*_loc* methods are called via
hlcg rather than via cg, since a location can be a subsetref/reg and
and those are no longer handled in tcg
o that then required moving several force_location_* routines into
thlcg because they use a_load_loc*, but did not take tdef size
parameters (which are required by the thlcg a_load_loc* routines)
o the only practical consequence is that from now on, you have to
use hlcg.location_force_mem/reg() (fpureg not yet) and
hlcg.gen_load_loc_cgpara() instead of the removed versions from ncgutil,
and hlcg.a_load*loc*() instead of cg.a_load*loc* if a subsetref/reg
might be involved
git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21287 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'compiler/powerpc/nppcadd.pas')
| -rw-r--r-- | compiler/powerpc/nppcadd.pas | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/compiler/powerpc/nppcadd.pas b/compiler/powerpc/nppcadd.pas index 00e424baab..7b38f363de 100644 --- a/compiler/powerpc/nppcadd.pas +++ b/compiler/powerpc/nppcadd.pas @@ -51,7 +51,7 @@ interface cgbase,cpuinfo,pass_1,pass_2,regvars, cpupara,cgcpu,cgutils,procinfo, ncon,nset, - ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32; + ncgutil,tgobj,rgobj,rgcpu,cgobj,hlcgobj,cg64f32; {***************************************************************************** @@ -436,8 +436,8 @@ interface else begin // const32 - reg64 - location_force_reg(current_asmdata.CurrAsmList,left.location, - OS_32,true); + hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location, + left.resultdef,u32inttype,true); current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBC, location.register64.reglo,left.location.register64.reglo, right.location.register64.reglo)); @@ -451,7 +451,7 @@ interface current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_SUBFIC, location.register64.reglo,right.location.register64.reglo,0)); left.location.value64 := left.location.value64 shr 32; - location_force_reg(current_asmdata.CurrAsmList,left.location,OS_32,true); + hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,true); current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBFE, location.register64.reghi,right.location.register64.reghi, left.location.register)); @@ -459,8 +459,8 @@ interface else begin // const64 - reg64 - location_force_reg(current_asmdata.CurrAsmList,left.location, - def_cgsize(left.resultdef),false); + hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location, + left.resultdef,left.resultdef,false); cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,location.size, right.location.register64,left.location.register64, location.register64); |