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| author | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2019-09-03 21:07:33 +0000 |
|---|---|---|
| committer | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2019-09-03 21:07:33 +0000 |
| commit | 94967f5b2c7f3491d0efa9fc3e4b6174ed5657cf (patch) | |
| tree | 14a55b0f30d91317012588503d00df92eef25f23 /compiler/riscv64 | |
| parent | 7293069cebf22f26cacf115eb524a7cd082bd23f (diff) | |
| download | fpc-94967f5b2c7f3491d0efa9fc3e4b6174ed5657cf.tar.gz | |
somehow committing went wrong, second part of last commit:
+ AArch64: support for vX.8b/vX.16b register names
+ support for more than 256 registers in the register dat files
- removed totherregisterset
+ AArch64: use vmov to load immediates if possible
+ AArch64: use eor to clear mm registers
git-svn-id: https://svn.freepascal.org/svn/fpc/trunk@42917 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'compiler/riscv64')
| -rw-r--r-- | compiler/riscv64/cpubase.pas | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/compiler/riscv64/cpubase.pas b/compiler/riscv64/cpubase.pas index a93b3a2d1f..48fcffc9a7 100644 --- a/compiler/riscv64/cpubase.pas +++ b/compiler/riscv64/cpubase.pas @@ -124,7 +124,6 @@ const type { Number of registers used for indexing in tables } tregisterindex=0..{$i rrv32nor.inc}-1; - totherregisterset = set of tregisterindex; const maxvarregs = 32-6; { 32 int registers - r0 - stackpointer - r2 - 3 scratch registers } |