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authorjonas <jonas@3ad0048d-3df7-0310-abae-a5850022a9f2>2015-07-03 21:01:18 +0000
committerjonas <jonas@3ad0048d-3df7-0310-abae-a5850022a9f2>2015-07-03 21:01:18 +0000
commitddc2170ecb6450602a07b3945386305cac846fa5 (patch)
tree19cae59a72f95d1d84d93ee19b56bfa50a2b3700 /compiler/x86/nx86inl.pas
parent1366d369a4c14047debc51fdac90593b91fb3458 (diff)
downloadfpc-ddc2170ecb6450602a07b3945386305cac846fa5.tar.gz
* remove implicit typecast to extended automatically inserted for trunc/round
(due to the declaration in the system unit) on x86_64 if this allows us to use SSE code instead (mantis #28366) git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@31192 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'compiler/x86/nx86inl.pas')
-rw-r--r--compiler/x86/nx86inl.pas11
1 files changed, 11 insertions, 0 deletions
diff --git a/compiler/x86/nx86inl.pas b/compiler/x86/nx86inl.pas
index 6c2adc3bad..c0ea7388ee 100644
--- a/compiler/x86/nx86inl.pas
+++ b/compiler/x86/nx86inl.pas
@@ -30,6 +30,9 @@ interface
type
tx86inlinenode = class(tcginlinenode)
+ protected
+ procedure maybe_remove_round_trunc_typeconv; virtual;
+ public
{ first pass override
so that the code generator will actually generate
these nodes.
@@ -91,6 +94,12 @@ implementation
TX86INLINENODE
*****************************************************************************}
+ procedure tx86inlinenode.maybe_remove_round_trunc_typeconv;
+ begin
+ { only makes a difference for x86_64 }
+ end;
+
+
function tx86inlinenode.first_pi : tnode;
begin
if (tfloatdef(pbestrealtype^).floattype=s80real) then
@@ -202,6 +211,7 @@ implementation
function tx86inlinenode.first_round_real : tnode;
begin
+ maybe_remove_round_trunc_typeconv;
{$ifdef x86_64}
if use_vectorfpu(left.resultdef) then
expectloc:=LOC_REGISTER
@@ -214,6 +224,7 @@ implementation
function tx86inlinenode.first_trunc_real: tnode;
begin
+ maybe_remove_round_trunc_typeconv;
if (cs_opt_size in current_settings.optimizerswitches)
{$ifdef x86_64}
and not(use_vectorfpu(left.resultdef))