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| author | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2015-08-31 20:03:56 +0000 |
|---|---|---|
| committer | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2015-08-31 20:03:56 +0000 |
| commit | 14ed19bf6865d2576f405a39917d75bf50664df6 (patch) | |
| tree | 134c814d1d5f8a272cd64a2ae5832c666529fea6 /compiler/x86 | |
| parent | cbe33fefccf85f2a86f9c46b47e3bef885082892 (diff) | |
| download | fpc-14ed19bf6865d2576f405a39917d75bf50664df6.tar.gz | |
* the test $-1,%reg optimization shall be done not only if the cpu type is i386, but for the i386 compiler
git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@31474 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'compiler/x86')
| -rw-r--r-- | compiler/x86/nx86add.pas | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/compiler/x86/nx86add.pas b/compiler/x86/nx86add.pas index 1c57544131..db6a9b428f 100644 --- a/compiler/x86/nx86add.pas +++ b/compiler/x86/nx86add.pas @@ -132,14 +132,15 @@ unit nx86add; (right.location.loc=LOC_CONSTANT) and (right.location.value=0) then begin - { 'test $-1,%reg' is transformable into 'test $-1,spilltemp' if %reg needs - spilling, while 'test %reg,%reg' still requires loading into register. - If spilling is not necessary, it is changed back into 'test %reg,%reg' by - peephole optimizer (this optimization is currently available only for i386). } - if (target_info.cpu=cpu_i386) then - emit_const_reg(A_TEST,TCGSize2Opsize[opsize],aint(-1),left.location.register) - else - emit_reg_reg(A_TEST,TCGSize2Opsize[opsize],left.location.register,left.location.register); + { 'test $-1,%reg' is transformable into 'test $-1,spilltemp' if %reg needs + spilling, while 'test %reg,%reg' still requires loading into register. + If spilling is not necessary, it is changed back into 'test %reg,%reg' by + peephole optimizer (this optimization is currently available only for i386). } +{$ifdef i386} + emit_const_reg(A_TEST,TCGSize2Opsize[opsize],aint(-1),left.location.register) +{$else i386} + emit_reg_reg(A_TEST,TCGSize2Opsize[opsize],left.location.register,left.location.register); +{$endif i386} end else if (op=A_ADD) and |