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authorjonas <jonas@3ad0048d-3df7-0310-abae-a5850022a9f2>2006-04-09 18:21:35 +0000
committerjonas <jonas@3ad0048d-3df7-0310-abae-a5850022a9f2>2006-04-09 18:21:35 +0000
commitd582cb43e5b3a595ff01b09fe214e9f9ae9c5bd6 (patch)
treee7d471b2d8901aac89183a3f1d91c9ec971bb2c6 /rtl
parent655eb04a98db3a268252d7bb06b7166a408a4996 (diff)
downloadfpc-d582cb43e5b3a595ff01b09fe214e9f9ae9c5bd6.tar.gz
* changed record typecast into shift to avoid q3 becoming not
regable in FPC_MUL_INT64 git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@3183 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'rtl')
-rw-r--r--rtl/inc/int64.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/rtl/inc/int64.inc b/rtl/inc/int64.inc
index 715e84537b..68b1332cb8 100644
--- a/rtl/inc/int64.inc
+++ b/rtl/inc/int64.inc
@@ -348,7 +348,7 @@
((q1>q3) or (q2>q3) or
{ the bit 63 can be only set if we have $80000000 00000000 }
{ and sign is true }
- ((tqwordrec(q3).high and dword($80000000))<>0) and
+ (q3 shr 63<>0) and
((q3<>(qword(1) shl 63)) or not(sign))
) then
HandleErrorFrame(215,get_frame);