diff options
Diffstat (limited to 'compiler/avr/rgcpu.pas')
| -rw-r--r-- | compiler/avr/rgcpu.pas | 27 |
1 files changed, 20 insertions, 7 deletions
diff --git a/compiler/avr/rgcpu.pas b/compiler/avr/rgcpu.pas index 006c721c0d..2f8e7bf023 100644 --- a/compiler/avr/rgcpu.pas +++ b/compiler/avr/rgcpu.pas @@ -155,6 +155,13 @@ unit rgcpu; A_LDI: for r:=RS_R0 to RS_R15 do add_edge(r,GetSupReg(taicpu(p).oper[0]^.reg)); + A_STS: + for r:=RS_R0 to RS_R15 do + add_edge(r,GetSupReg(taicpu(p).oper[1]^.reg)); + A_ADIW: + for r:=RS_R0 to RS_R31 do + if not (r in [RS_R24,RS_R26,RS_R28,RS_R30]) then + add_edge(r,GetSupReg(taicpu(p).oper[0]^.reg)); A_MULS: begin for r:=RS_R0 to RS_R15 do @@ -162,6 +169,14 @@ unit rgcpu; for r:=RS_R0 to RS_R15 do add_edge(r,GetSupReg(taicpu(p).oper[1]^.reg)); end; + A_LDD: + for r:=RS_R0 to RS_R31 do + if not (r in [RS_R28,RS_R30]) then + add_edge(r,GetSupReg(taicpu(p).oper[1]^.ref^.base)); + A_STD: + for r:=RS_R0 to RS_R31 do + if not (r in [RS_R28,RS_R30]) then + add_edge(r,GetSupReg(taicpu(p).oper[0]^.ref^.base)); end; end; end; @@ -175,8 +190,8 @@ unit rgcpu; if not(spilltemp.offset in [0..63]) then exit; - { Replace 'mov dst,orgreg' with 'ld dst,spilltemp' - and 'mov orgreg,src' with 'st dst,spilltemp' } + { Replace 'mov dst,orgreg' with 'ldd dst,spilltemp' + and 'mov orgreg,src' with 'std spilltemp,src' } with instr do begin if (opcode=A_MOV) and (ops=2) and (oper[1]^.typ=top_reg) and (oper[0]^.typ=top_reg) then @@ -185,10 +200,8 @@ unit rgcpu; (get_alias(getsupreg(oper[0]^.reg))=orgreg) and (get_alias(getsupreg(oper[1]^.reg))<>orgreg) then begin - { str expects the register in oper[0] } - instr.loadreg(0,oper[1]^.reg); - instr.loadref(1,spilltemp); - opcode:=A_ST; + instr.loadref(0,spilltemp); + opcode:=A_STD; result:=true; end else if (getregtype(oper[1]^.reg)=regtype) and @@ -196,7 +209,7 @@ unit rgcpu; (get_alias(getsupreg(oper[0]^.reg))<>orgreg) then begin instr.loadref(1,spilltemp); - opcode:=A_LD; + opcode:=A_LDD; result:=true; end; end; |