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Diffstat (limited to 'compiler/mips/cpuinfo.pas')
-rw-r--r--compiler/mips/cpuinfo.pas107
1 files changed, 105 insertions, 2 deletions
diff --git a/compiler/mips/cpuinfo.pas b/compiler/mips/cpuinfo.pas
index 2a02a02e22..77a2a03aab 100644
--- a/compiler/mips/cpuinfo.pas
+++ b/compiler/mips/cpuinfo.pas
@@ -38,7 +38,8 @@ Type
cpu_mips4,
cpu_mips5,
cpu_mips32,
- cpu_mips32r2
+ cpu_mips32r2,
+ cpu_pic32mx
);
tfputype =(fpu_none,fpu_soft,fpu_mips2,fpu_mips3);
@@ -80,7 +81,8 @@ Const
{ cpu_mips4 } 'MIPS4',
{ cpu_mips5 } 'MIPS5',
{ cpu_mips32 } 'MIPS32',
- { cpu_mips32r2 } 'MIPS32R2'
+ { cpu_mips32r2 } 'MIPS32R2',
+ { cpu_pic32mx } 'PIC32MX'
);
fputypestr : array[tfputype] of string[9] = ('',
@@ -102,6 +104,107 @@ Const
mips_abi : tabitype = abi_default;
+{$ifdef MIPSEL}
+type
+ tcpuflags=(CPUMIPS_HAS_XXXX); //Todo: Does this need to be filled?
+
+const
+ cpu_capabilities : array[tcputype] of set of tcpuflags =
+ ( { cpu_none } [],
+ { cpu_mips1 } [],
+ { cpu_mips2 } [],
+ { cpu_mips3 } [],
+ { cpu_mips4 } [],
+ { cpu_mips5 } [],
+ { cpu_mips32 } [],
+ { cpu_mips32r2 } [],
+ { cpu_pic32mx } []
+ );
+
+
+type
+ tcontrollertype =
+ (ct_none,
+ { pic32mx }
+ ct_pic32mx110f016b,
+ ct_pic32mx110f016c,
+ ct_pic32mx110f016d,
+ ct_pic32mx120f032b,
+ ct_pic32mx120f032c,
+ ct_pic32mx120f032d,
+ ct_pic32mx130f064b,
+ ct_pic32mx130f064c,
+ ct_pic32mx130f064d,
+ ct_pic32mx150f128b,
+ ct_pic32mx150f128c,
+ ct_pic32mx150f128d,
+ ct_pic32mx210f016b,
+ ct_pic32mx210f016c,
+ ct_pic32mx210f016d,
+ ct_pic32mx220f032b,
+ ct_pic32mx220f032c,
+ ct_pic32mx220f032d,
+ ct_pic32mx230f064b,
+ ct_pic32mx230f064c,
+ ct_pic32mx230f064d,
+ ct_pic32mx250f128b,
+ ct_pic32mx250f128c,
+ ct_pic32mx250f128d,
+ ct_pic32mx775f256h,
+ ct_pic32mx775f256l,
+ ct_pic32mx775f512h,
+ ct_pic32mx775f512l,
+ ct_pic32mx795f512h,
+ ct_pic32mx795f512l
+ );
+
+ { We know that there are fields after sramsize
+ but we don't care about this warning }
+ {$WARN 3177 OFF}
+const
+ embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
+ (
+ (controllertypestr:''; controllerunitstr:''; flashbase:0; flashsize:0; srambase:0; sramsize:0),
+
+ { PIC32MX1xx Series}
+ (controllertypestr:'PIC32MX110F016B'; controllerunitstr:'PIC32MX1xxFxxxB'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX110F016C'; controllerunitstr:'PIC32MX1xxFxxxC'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX110F016D'; controllerunitstr:'PIC32MX1xxFxxxD'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX120F032B'; controllerunitstr:'PIC32MX1xxFxxxB'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX120F032C'; controllerunitstr:'PIC32MX1xxFxxxC'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX120F032D'; controllerunitstr:'PIC32MX1xxFxxxD'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX130F064B'; controllerunitstr:'PIC32MX1xxFxxxB'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX130F064C'; controllerunitstr:'PIC32MX1xxFxxxC'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX130F064D'; controllerunitstr:'PIC32MX1xxFxxxD'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX150F128B'; controllerunitstr:'PIC32MX1xxFxxxB'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX150F128C'; controllerunitstr:'PIC32MX1xxFxxxC'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX150F128D'; controllerunitstr:'PIC32MX1xxFxxxD'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+
+ { PIC32MX2xx Series}
+ (controllertypestr:'PIC32MX210F016B'; controllerunitstr:'PIC32MX2xxFxxxB'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX210F016C'; controllerunitstr:'PIC32MX2xxFxxxC'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX210F016D'; controllerunitstr:'PIC32MX2xxFxxxD'; flashbase:$9d000000; flashsize:$00004000; srambase:$A0000000; sramsize:$00001000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX220F032B'; controllerunitstr:'PIC32MX2xxFxxxB'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX220F032C'; controllerunitstr:'PIC32MX2xxFxxxC'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX220F032D'; controllerunitstr:'PIC32MX2xxFxxxD'; flashbase:$9d000000; flashsize:$00008000; srambase:$A0000000; sramsize:$00002000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX230F064B'; controllerunitstr:'PIC32MX2xxFxxxB'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX230F064C'; controllerunitstr:'PIC32MX2xxFxxxC'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX230F064D'; controllerunitstr:'PIC32MX2xxFxxxD'; flashbase:$9d000000; flashsize:$00010000; srambase:$A0000000; sramsize:$00004000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX250F128B'; controllerunitstr:'PIC32MX2xxFxxxB'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX250F128C'; controllerunitstr:'PIC32MX2xxFxxxC'; flashbase:$9d000000; flashsize:$00020000; srambase:$80000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+ (controllertypestr:'PIC32MX250F128D'; controllerunitstr:'PIC32MX2xxFxxxD'; flashbase:$9d000000; flashsize:$00020000; srambase:$A0000000; sramsize:$00008000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00000BEF),
+
+ { PIC32MX7x5 Series}
+ (controllertypestr:'PIC32MX775F256H'; controllerunitstr:'PIC32MX7x5FxxxH'; flashbase:$9d000000; flashsize:$00040000; srambase:$A0000000; sramsize:$00010000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
+ (controllertypestr:'PIC32MX775F256L'; controllerunitstr:'PIC32MX7x5FxxxL'; flashbase:$9d000000; flashsize:$00040000; srambase:$A0000000; sramsize:$00010000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
+ (controllertypestr:'PIC32MX775F512H'; controllerunitstr:'PIC32MX7x5FxxxH'; flashbase:$9d000000; flashsize:$00080000; srambase:$A0000000; sramsize:$00010000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
+ (controllertypestr:'PIC32MX775F512L'; controllerunitstr:'PIC32MX7x5FxxxL'; flashbase:$9d000000; flashsize:$00080000; srambase:$A0000000; sramsize:$00010000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
+ (controllertypestr:'PIC32MX795F512H'; controllerunitstr:'PIC32MX7x5FxxxH'; flashbase:$9d000000; flashsize:$00080000; srambase:$A0000000; sramsize:$00020000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF),
+ (controllertypestr:'PIC32MX795F512L'; controllerunitstr:'PIC32MX7x5FxxxL'; flashbase:$9d000000; flashsize:$00080000; srambase:$A0000000; sramsize:$00020000; eeprombase:0; eepromsize:0; bootbase:$BFC00000; bootsize:$00002FEF)
+ );
+
+{$endif MIPSEL}
+
{ Supported optimizations, only used for information }
supported_optimizerswitches = [cs_opt_regvar,cs_opt_loopunroll,cs_opt_nodecse,
cs_opt_reorder_fields,cs_opt_fastmath];