summaryrefslogtreecommitdiff
path: root/rtl/nds/cprt09.as
diff options
context:
space:
mode:
Diffstat (limited to 'rtl/nds/cprt09.as')
-rw-r--r--rtl/nds/cprt09.as154
1 files changed, 110 insertions, 44 deletions
diff --git a/rtl/nds/cprt09.as b/rtl/nds/cprt09.as
index 75bfd6b64c..5807ce289f 100644
--- a/rtl/nds/cprt09.as
+++ b/rtl/nds/cprt09.as
@@ -1,3 +1,9 @@
+/*--------------------------------------------------------------------------------
+ This Source Code Form is subject to the terms of the Mozilla Public License,
+ v. 2.0. If a copy of the MPL was not distributed with this file, You can
+ obtain one at https://mozilla.org/MPL/2.0/.
+--------------------------------------------------------------------------------*/
+
@---------------------------------------------------------------------------------
@ DS processor selection
@---------------------------------------------------------------------------------
@@ -8,7 +14,7 @@
.equ _libnds_argv,0x02FFFE70
@---------------------------------------------------------------------------------
- .section ".init"
+ .section ".crt0","ax"
.global _start
@---------------------------------------------------------------------------------
.align 4
@@ -16,7 +22,7 @@
@---------------------------------------------------------------------------------
_start:
@---------------------------------------------------------------------------------
- mov r0, #0x04000000 @ IME = 0;
+ mov r0, #0x04000000 @ IME = 0;
str r0, [r0, #0x208]
@ set sensible stacks to allow bios call
@@ -31,7 +37,7 @@ _start:
sub r1,r1,#0x100
mov sp,r1
- ldr r3,=__libnds_mpu_setup
+ ldr r3, =__libnds_mpu_setup
blx r3
mov r0, #0x12 @ Switch to IRQ Mode
@@ -46,23 +52,47 @@ _start:
msr cpsr, r0
ldr sp, =__sp_usr @ Set user stack
+ mov r12, #0x4000000 @ Read system ROM status (NTR/TWL)
+ ldrb r11, [r12,r12,lsr #12]
+ and r11, r11, #0x3
+
+ mov r9, #(0x0<<8) @ Synchronize with ARM7
+ str r9, [r12, #0x180]
+ mov r9, #0x9
+ bl IPCSync
+ mov r9, #(0xA<<8)
+ str r9, [r12, #0x180]
+ mov r9, #0xB
+ bl IPCSync
+ mov r9, #(0xC<<8)
+ str r9, [r12, #0x180]
+ mov r9, #0xD
+ bl IPCSync
+ mov r9, r11, lsl #8
+ str r9, [r12, #0x180]
+ mov r9, #0
+ bl IPCSync
+ str r9, [r12, #0x180]
+
ldr r1, =__itcm_lma @ Copy instruction tightly coupled memory (itcm section) from LMA to VMA
ldr r2, =__itcm_start
ldr r4, =__itcm_end
bl CopyMemCheck
- ldr r1, =__vectors_lma @ Copy reserved vectors area (itcm section) from LMA to VMA
- ldr r2, =__vectors_start
- ldr r4, =__vectors_end
-
- bl CopyMemCheck
+ ldr r1, =__vectors_lma @ Copy reserved vectors area (itcm section) from LMA to VMA
+ ldr r2, =__vectors_start
+ ldr r4, =__vectors_end
+ bl CopyMemCheck
ldr r1, =__dtcm_lma @ Copy data tightly coupled memory (dtcm section) from LMA to VMA
ldr r2, =__dtcm_start
ldr r4, =__dtcm_end
bl CopyMemCheck
- bl checkARGV @ check and process argv trickery
+ cmp r11, #1
+ ldrne r10, =__end__ @ (DS mode) heap start
+ ldreq r10, =__twl_end__ @ (DSi mode) heap start
+ bl checkARGV @ check and process argv trickery
ldr r0, =__bss_start__ @ Clear BSS section
ldr r1, =__bss_end__
@@ -73,64 +103,88 @@ _start:
ldr r1, =__sbss_end
sub r1, r1, r0
bl ClearMem
-
- ldr r0, =_libnds_argv
+
+ cmp r11, #1
+ bne NotTWL
+ ldr r9, =__dsimode @ set DSi mode flag
+ strb r11, [r9]
+
+ @ Copy TWL area (arm9i section) from LMA to VMA
+ ldr r1, =0x02ffe1c8 @ Get ARM9i LMA from header
+ ldr r1, [r1]
+
+ ldr r2, =__arm9i_start__
+ cmp r1, r2 @ skip copy if LMA=VMA
+ ldrne r4, =__arm9i_end__
+ blne CopyMemCheck
+
+ ldr r0, =__twl_bss_start__ @ Clear TWL BSS section
+ ldr r1, =__twl_bss_end__
+ sub r1, r1, r0
+ bl ClearMem
+
+NotTWL:
+ ldr r0, =_libnds_argv
@ reset heap base
- ldr r2, [r0,#20] @ newheap base
- ldr r1,=fake_heap_start
- str r2,[r1]
+ ldr r2, [r0,#20] @ newheap base
+ cmp r2, #0
+ moveq r2, r10
+ ldr r1, =fake_heap_start @ set heap start
+ str r2, [r1]
ldr r1, =fake_heap_end @ set heap end
- sub r8,r8,#0xc000
+ sub r8, r8,#0xc000
str r8, [r1]
- push {r0}
- ldr r3, =initSystem
- blx r3 @ system initialisation
- ldr r3, =__libc_init_array @ global constructors
- blx r3
- pop {r0}
+ push {r0}
+ ldr r0, =__secure_area__
+ ldr r3, =initSystem
+ blx r3 @ system initialisation
+
+ ldr r3, =__libc_init_array @ global constructors
+ blx r3
- ldr r1, [r0,#16] @ argv
- ldr r0, [r0,#12] @ argc
+ pop {r0}
+ ldr r1, [r0,#16] @ argv
+ ldr r0, [r0,#12] @ argc
ldr r3, =main
- ldr lr,=__libnds_exit
+ ldr lr, =__libnds_exit
bx r3 @ jump to user code
@---------------------------------------------------------------------------------
-@ check for a commandline
+@ check for a commandline
@---------------------------------------------------------------------------------
checkARGV:
@---------------------------------------------------------------------------------
- ldr r0, =_libnds_argv @ argv structure
+ ldr r0, =_libnds_argv @ argv structure
mov r1, #0
- str r1, [r0,#12] @ clear argc
- str r1, [r0,#16] @ clear argv
-
+ str r1, [r0,#12] @ clear argc
+ str r1, [r0,#16] @ clear argv
+
ldr r3, [r0] @ argv magic number
ldr r2, =0x5f617267 @ '_arg'
cmp r3, r2
- strne r1,[r0,#20]
- bxne lr @ bail out if no magic
-
- ldr r1, [r0, #4] @ command line address
- ldr r2, [r0, #8] @ length of command line
+ strne r1, [r0,#20]
+ bxne lr @ bail out if no magic
+
+ ldr r1, [r0, #4] @ command line address
+ ldr r2, [r0, #8] @ length of command line
@ copy to heap
- ldr r3, =__end__ @ initial heap base
- str r3, [r0, #4] @ set command line address
-
- cmp r2, #0
- subnes r4, r3, r1 @ dst-src
- bxeq lr @ dst == src || len==0 : nothing to do.
+ mov r3, r10 @ initial heap base
+ str r3, [r0, #4] @ set command line address
- cmphi r2, r4 @ len > (dst-src)
+ cmp r2, #0
+ subnes r4, r3, r1 @ dst-src
+ bxeq lr @ dst == src || len==0 : nothing to do.
+
+ cmphi r2, r4 @ len > (dst-src)
bhi .copybackward
-.copyforward:
+.copyforward:
ldrb r4, [r1], #1
strb r4, [r3], #1
subs r2, r2, #1
@@ -148,7 +202,7 @@ checkARGV:
ldr r3, =build_argv
blx r3
pop {lr}
- bx lr
+ bx lr
@---------------------------------------------------------------------------------
@@ -199,8 +253,20 @@ CIDLoop:
bne CIDLoop
bx lr
+
+@---------------------------------------------------------------------------------
+@ Synchronize with ARM7
+@---------------------------------------------------------------------------------
+IPCSync:
+@---------------------------------------------------------------------------------
+ ldr r10, [r12, #0x180]
+ and r10, r10, #0xF
+ cmp r10, r9
+ bne IPCSync
+ bx lr
+
@---------------------------------------------------------------------------------
.align
.pool
.end
-@---------------------------------------------------------------------------------
+@--------------------------------------------------------------------------------- \ No newline at end of file
View Lorry Controller Status