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* Merge of several commits related to enhancements in PPU writingpierre2019-11-041-0/+2
* * rest of the previous accidental partial commitjonas2019-02-071-1/+1
* Marge of more trunk fixes into fixes branch.pierre2018-12-231-15/+15
* Merge of trunk commits 39983,39986,40109pierre2018-12-061-0/+5
* * removed temppos field again from parameter locations: they're not allocatedjonas2018-04-271-2/+2
* * keep track of the temp position separately from the offset in references,jonas2018-04-223-5/+5
* * replaced the saved_XXX_registers arrays with virtual methods insidenickysn2018-04-191-14/+0
* * missing skiplabel added, resolves #33423florian2018-03-131-0/+1
* * handle bitpacked booleans more efficientlyflorian2018-03-121-26/+60
* * fix register allocation for MovOp2Op and PushPushPopPop2MovMovflorian2018-03-101-15/+30
* * handle movw in TCpuAsmOptimizer.RegInInstructionflorian2018-03-101-0/+4
* + allocate real registers properly in tcgavrflorian2018-03-101-12/+61
* + AVR PeepHoleOptPass1Cpu makes use of TAOptObj.RemoveCurrentP to track regis...florian2018-03-101-66/+14
* + Mov2Nopflorian2018-03-101-0/+29
* * improved OpCp2Opflorian2018-03-101-3/+7
* + AddAdc2Addflorian2018-03-101-0/+32
* * simplify tcgavr.a_op_reg_reg_internalflorian2018-03-101-12/+6
* * correctly negate 8 bit values on avr, resolves #33322florian2018-03-041-1/+5
* * patch by Christo Crause: more descriptive error message when BRxx destinati...florian2018-02-251-1/+1
* + RCallReg2RJmp optimizationflorian2018-02-221-0/+14
* * patch by Christo Crause to support ~ in att assemblerflorian2018-02-222-9/+10
* * better suitable error message for out of range constantsflorian2018-02-191-1/+1
* * patch (indention adapted) by Christo Crause to check avr inline assembler, ...florian2018-02-181-4/+329
* * patch by Christo Crause: the subarch type for atmega 8, 8A, 16 & 32 was inc...florian2018-02-181-4/+4
* * fixes not(<qwordbool>) on armflorian2018-02-161-4/+7
* * do not destroy flags while clearing R1, resolves #33170florian2018-02-141-2/+2
* * clear r1 (and save/restore) in interrupt routines on avrflorian2018-02-131-14/+26
* * based on a patch by Christo Crause: in finalizeavrcode, ignore assembler br...florian2018-01-311-2/+2
* * patch by Christo Crause: prevent that the compiler converts breq into jmp i...florian2018-01-311-6/+11
* * patch by Christo Crause to resolve #33098: AVR - LDS assembler instruction ...florian2018-01-301-1/+2
* * LDD/STD need always an offset, resolves #33086florian2018-01-281-10/+15
* * factored out check to determine whether a variable can be subscripted injonas2018-01-011-7/+2
* Fixed internal error in case inline assembler constants are used.laksen2017-12-291-0/+2
* Changed subarch of at90pwm161laksen2017-12-291-1/+1
* * avr: correctly write references to nil, resolves #32821florian2017-12-281-1/+4
* * apply MovOpMov2Op also to inc and decflorian2017-11-261-12/+7
* * do not generate an andi if the constant is 255florian2017-11-191-1/+1
* * LdiMov/Cp2Ldi/Cpi may not be performed if reg0=reg1florian2017-11-191-11/+8
* * after a LdiMov/Cp2Ldi/Cpi optimization, the compiler should not continue to...florian2017-11-191-8/+6
* + implemented some AVR specific intrinsicsflorian2017-11-013-0/+126
* * write absolute references correctly on avr, resolves #32040florian2017-10-071-1/+3
* changes to fix #32043florian2017-10-062-10/+18
* * patch by Christo Crause to implement 8 bit multiplications for "mul-less" a...florian2017-10-011-2/+25
* handle correctly "reg+const" operands in avr assembler, fixes issue #32016florian2017-09-262-7/+16
* * fix avr for new GetNextReg behaviourflorian2017-09-241-20/+69
* * also integrated the getnextreg() implementation for 8-bit and 16-bit alus fromnickysn2017-09-111-7/+0
* * integrated the getintregister() implementation for 8-bit and 16-bit alus fromnickysn2017-09-111-45/+0
* * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) movednickysn2017-09-114-51/+38
* + optimized avr code generation for shr by shiftcount=size*8-1 and sar bynickysn2017-08-091-1/+24
* + added F_PL and F_MI to TResFlags for avr. This allows generating the BRPL andnickysn2017-08-091-4/+4