| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | * do an even better optimization (swap registers in the result, saving 2 mov | nickysn | 2015-10-15 | 1 | -15/+11 |
| * | * user xor reg,reg to zero out registers in the i8086 optimized 64-bit shl code | nickysn | 2015-10-15 | 1 | -10/+10 |
| * | * in the i8086 64-bit shl code, use jcxz instead of test cx,cx+jz when | nickysn | 2015-10-15 | 1 | -2/+12 |
| * | + i8086 optimization for the code generated for 64-bit shl/shr with a constan... | nickysn | 2015-10-15 | 1 | -0/+21 |
| * | * optimized the generated code on i8086 for 64-bit shl/shr with constant >=48 | nickysn | 2015-10-15 | 1 | -0/+20 |
| * | * fixed DFA warnings for i8086 | karoly | 2014-08-20 | 1 | -0/+1 |
| * | + enabled the use of the DIV/IDIV instruction for 16-bit div/mod on i8086 | nickysn | 2013-11-11 | 1 | -7/+28 |
| * | * ti8086moddivnode.pass_generate_code converted to 16-bit. Note that this code | nickysn | 2013-11-11 | 1 | -100/+100 |
| * | + implemented 64-bit shl and shr for i8086 | nickysn | 2013-03-17 | 1 | -65/+66 |
| * | + added unit n8086mat, based on n386mat; TODO: adapt to i8086 | nickysn | 2013-03-12 | 1 | -0/+474 |
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index : delta/fpc.git | |
| svn.freepascal.org: svn/fpc |
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