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|
;
; AVR registers
;
; layout
; <name>,<type>,<value>,<stdname>,<stab idx>,<dwarf idx>
;
NO,$00,$00,INVALID,-1,-1
R0,$01,$00,r0,0,0
R1,$01,$01,r1,1,1
R2,$01,$02,r2,2,2
R3,$01,$03,r3,3,3
R4,$01,$04,r4,4,4
R5,$01,$05,r5,5,5
R6,$01,$06,r6,6,6
R7,$01,$07,r7,7,7
R8,$01,$08,r8,8,8
R9,$01,$09,r9,9,9
R10,$01,$0a,r10,10,10
R11,$01,$0b,r11,11,11
R12,$01,$0c,r12,12,12
R13,$01,$0d,r13,13,13
R14,$01,$0e,r14,14,14
R15,$01,$0f,r15,15,15
R16,$01,$10,r16,16,16
R17,$01,$11,r17,17,17
R18,$01,$12,r18,18,18
R19,$01,$13,r19,19,19
R20,$01,$14,r20,20,20
R21,$01,$15,r21,21,21
R22,$01,$16,r22,22,22
R23,$01,$17,r23,23,23
R24,$01,$18,r24,24,24
R25,$01,$19,r25,25,25
R26,$01,$1a,r26,26,26
R27,$01,$1b,r27,27,27
R28,$01,$1c,r28,28,28
R29,$01,$1d,r29,29,29
R30,$01,$1e,r30,30,30
R31,$01,$1f,r31,31,31
SREG,$05,$00,sreg,0,0
|
