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author | Keith Packard <keithpac@amazon.com> | 2023-03-02 12:58:15 -0800 |
---|---|---|
committer | Paul Bartell <paul.bartell@gmail.com> | 2023-03-30 12:32:55 -0700 |
commit | 642c495fcb8e0ad4790abb1cb3e5bd8f54a39956 (patch) | |
tree | 1e3d416f487c213aa9d1934b013f1c825e6e2514 /FreeRTOS | |
parent | f807222c85118002f1f980dfe4ec00befb083ded (diff) | |
download | freertos-git-642c495fcb8e0ad4790abb1cb3e5bd8f54a39956.tar.gz |
Demo/CORTEX_M3_MPS2_QEMU_GCC: Add TLS support to linker script
Allocate ROM for initialized thread local storage variables. Allocate
TLS offsets for all thread local storage variables.
Signed-off-by: Keith Packard <keithpac@amazon.com>
Diffstat (limited to 'FreeRTOS')
-rw-r--r-- | FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC/scripts/mps2_m3.ld | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC/scripts/mps2_m3.ld b/FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC/scripts/mps2_m3.ld index 0c5fa6dd7..7725e3fc7 100644 --- a/FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC/scripts/mps2_m3.ld +++ b/FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC/scripts/mps2_m3.ld @@ -74,6 +74,27 @@ SECTIONS . = ALIGN(4); } >FLASH + .tdata : { + *(.tdata .tdata.*) + } >FLASH + + .tbss (NOLOAD) : { + *(.tbss .tbss.* .gnu.linkonce.tb.*) + *(.tcommon) + PROVIDE( __tbss_end = . ); + PROVIDE( __tls_end = . ); + } >FLASH + PROVIDE( __tdata_source = LOADADDR(.tdata) ); + PROVIDE( __tdata_source_end = LOADADDR(.tdata) + SIZEOF(.tdata) ); + PROVIDE( __tdata_size = SIZEOF(.tdata) ); + PROVIDE( __tbss_offset = ADDR(.tbss) - ADDR(.tdata) ); + PROVIDE( __tbss_start = ADDR(.tbss) ); + PROVIDE( __tbss_size = SIZEOF(.tbss) ); + PROVIDE( __tls_size = __tls_end - ADDR(.tdata) ); + PROVIDE( __tls_align = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss)) ); + PROVIDE( __arm32_tls_tcb_offset = MAX(8, __tls_align) ); + PROVIDE( __arm64_tls_tcb_offset = MAX(16, __tls_align) ); + .interrupts_ram : { . = ALIGN(4); |