diff options
Diffstat (limited to 'FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/IAR/Secure/FreeRTOSDemo_flash_s.icf')
| -rw-r--r-- | FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/IAR/Secure/FreeRTOSDemo_flash_s.icf | 122 |
1 files changed, 122 insertions, 0 deletions
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/IAR/Secure/FreeRTOSDemo_flash_s.icf b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/IAR/Secure/FreeRTOSDemo_flash_s.icf new file mode 100644 index 000000000..fbccbfc44 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/IAR/Secure/FreeRTOSDemo_flash_s.icf @@ -0,0 +1,122 @@ +/* +** ################################################################### +** Processors: LPC55S69JBD100_cm33_core0 +** LPC55S69JBD64_cm33_core0 +** LPC55S69JEV98_cm33_core0 +** +** Compiler: IAR ANSI C/C++ Compiler for ARM +** Reference manual: LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3 16 May 2019 +** Version: rev. 1.1, 2019-05-16 +** Build: b190926 +** +** Abstract: +** Linker file for the IAR ANSI C/C++ Compiler for ARM +** +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2019 NXP +** All rights reserved. +** +** SPDX-License-Identifier: BSD-3-Clause +** +** http: www.nxp.com +** mail: support@nxp.com +** +** ################################################################### +*/ + + +/* USB BDT size */ +define symbol usb_bdt_size = 0x0; +/* Stack and Heap Sizes */ +if (isdefinedsymbol(__stack_size__)) { + define symbol __size_cstack__ = __stack_size__; +} else { + define symbol __size_cstack__ = 0x0400; +} + +if (isdefinedsymbol(__heap_size__)) { + define symbol __size_heap__ = __heap_size__; +} else { + define symbol __size_heap__ = 0x0400; +} + +/* Only the first 64kB of flash is used as secure memory. */ +define symbol m_interrupts_start = 0x10000000; +define symbol m_interrupts_end = 0x100001FF; + +define symbol m_text_start = 0x10000200; +define symbol m_text_end = 0x1000FDFF; + +define exported symbol core1_image_start = 0x10072000; +define exported symbol core1_image_end = 0x1009D7FF; + +/* Only first 32kB of data RAM is used as secure memory. */ +if (isdefinedsymbol(__use_shmem__)) { + define symbol m_data_start = 0x30000000; + define symbol m_data_end = 0x30007FFF; + define exported symbol rpmsg_sh_mem_start = 0x30031800; + define exported symbol rpmsg_sh_mem_end = 0x30032FFF; +} else { + define symbol m_data_start = 0x30000000; + define symbol m_data_end = 0x30007FFF; +} + +/* 512B - memory for veneer table (NSC - secure, non-secure callable memory) */ +define symbol m_veneer_table_start = 0x1000FE00; +define symbol m_veneer_table_size = 0x200; + +define symbol m_usb_sram_start = 0x50100000; +define symbol m_usb_sram_end = 0x50103FFF; + +define memory mem with size = 4G; + +define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] + | mem:[from m_text_start to m_text_end]; +define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__]; +define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end]; +if (isdefinedsymbol(__use_shmem__)) { + define region rpmsg_sh_mem_region = mem:[from rpmsg_sh_mem_start to rpmsg_sh_mem_end]; +} + +define region VENEER_TABLE_region = mem:[from m_veneer_table_start to m_veneer_table_start + m_veneer_table_size - 1]; + +define block CSTACK with alignment = 8, size = __size_cstack__ { }; +define block HEAP with alignment = 8, size = __size_heap__ { }; +define block RW { readwrite }; +define block ZI { zi }; + +define region core1_region = mem:[from core1_image_start to core1_image_end]; +define block CORE1_IMAGE_WBLOCK { section __core1_image }; + +/* regions for USB */ +define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1]; +define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end]; +place in USB_BDT_region { section m_usb_bdt }; +place in USB_SRAM_region { section m_usb_global }; + +initialize by copy { readwrite, section .textrw }; + +if (isdefinedsymbol(__USE_DLIB_PERTHREAD)) +{ + /* Required in a multi-threaded application */ + initialize by copy with packing = none { section __DLIB_PERTHREAD }; +} + +do not initialize { section .noinit, section m_usb_bdt, section m_usb_global }; +if (isdefinedsymbol(__use_shmem__)) { + do not initialize { section rpmsg_sh_mem_section }; +} + +place at address mem: m_interrupts_start { readonly section .intvec }; +place in TEXT_region { readonly }; +place in DATA_region { block RW }; +place in DATA_region { block ZI }; +place in DATA_region { last block HEAP }; +place in CSTACK_region { block CSTACK }; +place in VENEER_TABLE_region { section Veneer$$CMSE }; + +if (isdefinedsymbol(__use_shmem__)) { + place in rpmsg_sh_mem_region { section rpmsg_sh_mem_section }; +} +place in core1_region { block CORE1_IMAGE_WBLOCK }; + |