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author | rtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2> | 2020-01-01 22:05:35 +0000 |
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committer | rtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2> | 2020-01-01 22:05:35 +0000 |
commit | 06f09ab954bc65b080d9b46a7912145e119d152a (patch) | |
tree | 2fad453f4a3bef67cf185809dfa39e5e695af0c5 /FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/riscv_clint0.h | |
parent | d57cc48551f8232ade2d10bfa5d61f1ea68f51b9 (diff) | |
download | freertos-06f09ab954bc65b080d9b46a7912145e119d152a.tar.gz |
Rename RISC-V_RV32_SiFive_HiFive1-FreedomStudio directory to RISC-V_RV32_SiFive_HiFive1-RevB-FreedomStudio as it targets Rev B of the hardware.
git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2790 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
Diffstat (limited to 'FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/riscv_clint0.h')
-rw-r--r-- | FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/riscv_clint0.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/riscv_clint0.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/riscv_clint0.h new file mode 100644 index 000000000..08d571e1c --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/riscv_clint0.h @@ -0,0 +1,24 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__RISCV_CLINT0_H +#define METAL__DRIVERS__RISCV_CLINT0_H + +#include <metal/compiler.h> +#include <metal/drivers/riscv_cpu.h> + +struct __metal_driver_vtable_riscv_clint0 { + struct metal_interrupt_vtable clint_vtable; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_riscv_clint0) + +#define __METAL_MACHINE_MACROS +#include <metal/machine.h> +struct __metal_driver_riscv_clint0 { + struct metal_interrupt controller; + int init_done; +}; +#undef __METAL_MACHINE_MACROS + +#endif |