Continue working on GCC/CA_9 port layer - tick interrupt now working but needs tidy up.

git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2174 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

2 files changed, 3 insertions, 1 deletions

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c b/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
index 84a6d1db9..b05eedecf 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
@@ -337,6 +337,7 @@ uint32_t ulAPSR;
 		if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE )

 		{

 			/* Start the timer that generates the tick ISR. */

+			__asm volatile( "cpsid i" );

 			configSETUP_TICK_INTERRUPT();

 

 //			__asm volatile( "cpsie i" );

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S b/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S
index 072e45e54..eb8320a81 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S
@@ -52,7 +52,6 @@
     licensing and training services.

 */

 

-

 	.text

 

 	.set SYS_MODE,	0x1f

@@ -241,6 +240,7 @@ FreeRTOS_IRQ_Handler:
 	/* Read value from the interrupt acknowledge register, which is stored in r0

 	for future parameter and interrupt clearing use. */

 	LDR 	r2, ulICCIARConst

+	LDR		r2, [r2]

 	LDR		r0, [r2]

 

 	/* Ensure bit 2 of the stack pointer is clear.  r2 holds the bit 2 value for

@@ -259,6 +259,7 @@ FreeRTOS_IRQ_Handler:
 

 	/* Write the value read from ICCIAR to ICCEOIR. */

 	LDR 	r4, ulICCEOIRConst

+	LDR		r4, [r4]

 	STR		r0, [r4]

 

 	/* Restore the old nesting count. */