diff options
| author | rtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2> | 2020-02-07 01:56:25 +0000 |
|---|---|---|
| committer | rtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2> | 2020-02-07 01:56:25 +0000 |
| commit | bab0e46d7558c3002ccd949f68a66ecece6721b6 (patch) | |
| tree | f2ee4404d3588766a504cea45dd09e5defbbc18a /FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c | |
| parent | 14ab00a72f72ddf9fc42269d6217cd9ec97a58fd (diff) | |
| download | freertos-bab0e46d7558c3002ccd949f68a66ecece6721b6.tar.gz | |
Add "is inside interrupt" function to MPU ports.
Make clock setup functions weak symbols in ARMv8-M ports.
Update Cortex-M33 ports to use an interrupt mask in place of globally disabling interrupts, as per the other Cortex-M ports.
git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2819 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
Diffstat (limited to 'FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c')
| -rw-r--r-- | FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c | 48 |
1 files changed, 41 insertions, 7 deletions
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c index b0394fb43..6ffab561f 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c @@ -258,11 +258,6 @@ /*-----------------------------------------------------------*/
/**
- * @brief Setup the timer to generate the tick interrupts.
- */
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
-
-/**
* @brief Used to catch tasks that attempt to return from their implementing
* function.
*/
@@ -283,6 +278,22 @@ static void prvTaskExitError( void ); #endif /* configENABLE_FPU */
/**
+ * @brief Setup the timer to generate the tick interrupts.
+ *
+ * The implementation in this file is weak to allow application writers to
+ * change the timer used to generate the tick interrupt.
+ */
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * @brief Checks whether the current execution context is interrupt.
+ *
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE
+ * otherwise.
+ */
+BaseType_t xPortIsInsideInterrupt( void );
+
+/**
* @brief Yield the processor.
*/
void vPortYield( void ) PRIVILEGED_FUNCTION;
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
{
/* Stop and reset the SysTick. */
*( portNVIC_SYSTICK_CTRL ) = 0UL;
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Start the timer that generates the tick ISR. Interrupts are disabled
* here already. */
- prvSetupTimerInterrupt();
+ vPortSetupTimerInterrupt();
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ }
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
+
+BaseType_t xPortIsInsideInterrupt( void )
+{
+uint32_t ulCurrentInterrupt;
+BaseType_t xReturn;
+
+ /* Obtain the number of the currently executing interrupt. Interrupt Program
+ * Status Register (IPSR) holds the exception number of the currently-executing
+ * exception or zero for Thread mode.*/
+ __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+
+ if( ulCurrentInterrupt == 0 )
+ {
+ xReturn = pdFALSE;
+ }
+ else
+ {
+ xReturn = pdTRUE;
+ }
+
+ return xReturn;
+}
+/*-----------------------------------------------------------*/
\ No newline at end of file |