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* Update the LM3Sxxxx_IAR_Keil demo so the IAR project writes to the UART and e...rtel2019-12-277-108/+342
* Updates to CM4_MPU RCDS portgaurav-aws2019-12-242-90/+146
* Remove local paths from the URL filesgaurav-aws2019-12-242-4/+0
* Add readme into the third party RISC-V port that points to the directories th...rtel2019-12-241-0/+6
* Add IAR MPU project for STM32L475 Discovery Kit IoT Nodegaurav-aws2019-12-2112-112/+3593
* Updates to CM4_MPU IAR portgaurav-aws2019-12-213-114/+153
* Increase test coverage for queue sets.rtel2019-12-2092-2/+347
* Remove build files accidentally checked in.rtel2019-12-20128-159033/+0
* Add MPU projects for STM32L475 Discovery Kit IoT Nodegaurav-aws2019-12-20103-0/+134687
* Updates to CM4_MPU GCC portgaurav-aws2019-12-202-22/+110
* Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+). yuhzheng2019-12-18218-0/+208291
* Cortex M0 GCC/IAR/Keil ports -- tickless support. yuhzheng2019-12-186-52/+689
* RVDS/Keil weak linkage for vPortSetupTimerInterrupt() -- CM4F, CM3 yuhzheng2019-12-182-3/+3
* Use linker script variables for MPU setup for Nuvoton M2351 Keil Projectgaurav-aws2019-12-174-75/+90
* Use the linker script variables for MPU setup for Keil Simulator Demogaurav-aws2019-12-172-52/+79
* Move warning suppression for IAR compiler to portmacro.h for v8M portsgaurav-aws2019-12-079-3/+58
* Check socket binding result before doing anything with socket. (This is to ad...yuhzheng2019-12-041-3/+9
* Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to ove...rtel2019-12-031-26/+35
* Add the Labs projects provided in the V10.2.1_191129 zip file.rtel2019-12-02801-0/+356576
* Remove guards against __ARMCC_VERSION version numbers that were previously us...rtel2019-11-2110-163/+29
* Add software timer to the Win32 blinky demo.rtel2019-11-183-2/+4
* Remove driver files that generate compiler warnings from the RISC-V_Renode_Em...rtel2019-11-1817-1913/+76
* Update to the latest atomic.h.rtel2019-11-187-178/+206
* Rename the RISC-V_RV32_SiFive_Hifive1_GCC folder to RISC-V_RV32_SiFive_HiFive...rtel2019-10-22172-0/+0
* Add nano-specs linker option to HiFive1_GCC demo.rtel2019-10-221-2/+2
* Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c f...rtel2019-10-223-8/+8
* Change version and license text in RISC-V_RV32_SiFive_HiFive1_GCC FreeRTOSCon...rtel2019-10-225-176/+44
* Tidy up main_full.c and change alignment of variable accesses in RegTest.S fo...rtel2019-10-223-5/+8
* Rework RISC-V QEMU example to use vanilla Eclipse in place of Freedom Studio....rtel2019-10-227-29/+16
* Add some asserts into the common demo tasks to catch scenarios where the task...rtel2019-10-213-1/+8
* Update RISK-V GCC port to ensure the first task starts with interrupts enable...rtel2019-10-211-4/+7
* Add the miv-basic.resc reNode script into the RISC-V_Renode_Emulator_SoftCons...rtel2019-10-171-0/+7
* Rename RISC-V-Qemu-sive_e_Freedom_Studio directory to RISC-V-Qemu-sifive_e-Ec...rtel2019-10-1658-0/+0
* Recreate the RISC-V-Qemu demo using Vanilla Eclipse in place of Freedom Studi...rtel2019-10-1615-802/+118
* Move the call to traceTASK_DELETE() to before port portPRE_TASK_DELETE_HOOK()...rtel2019-10-151-2/+5
* Add IAR demo for the SiFive RISC-V HiFive Rev B board.rtel2019-10-1417-0/+7889
* Update the RegTest.S file used by several GCC RISC-V demos to ensure correct ...rtel2019-10-143-3/+12
* Tidy up the RISC-V_RV32_SiFive_HiFive1_GCC demo ready for its eventual release.rtel2019-10-14151-22545/+160
* Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup che...rtel2019-10-1311-126/+1021
* RIS-V_RV32_SiFive_HiFive1_GCC project now running the blinky demo - still a w...rtel2019-10-1110-415/+365
* Formatting changes only.rtel2019-10-101-137/+137
* RISC-V-RV32_SiFive_HiFive1_GCC project is now also building the FreeRTOS kern...rtel2019-10-105-4/+527
* Base project to replace existing Freedom Studio project using latest Freedom ...rtel2019-10-09313-0/+35861
* Minor formatting change in comment only.rtel2019-10-071-4/+4
* Update FreeRTOS.h with the version in GitHub. This is also to test submodule.yuhzheng2019-09-241-6/+5
* Nordic port. Notes for Richard -- the work items we discussed about for nrf52...yuhzheng2019-09-245-0/+1027
* Revert 2728. Not because the files are still needed, but because we want to t...yuhzheng2019-09-243-0/+771
* Wiced_CY port is not needed anymore. Use GCC/ARM_CRx_No_GIC instead. yuhzheng2019-09-243-771/+0
* Adding tickless hooks to GCC/ARM_CRx_No_GIC port. yuhzheng2019-09-241-0/+6
* Correct code comments that referred to taskYIELD_FROM_ISR to portYIELD_FROM_ISR.rtel2019-09-244-7/+7
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