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* commit 70dcbe4527a45ab4fea6d58c016e7d3032f31e8cHEADmasterlundinc2020-08-12514-76/+790532
* commit 9f316c246baafa15c542a5aea81a94f26e3d6507lundinc2020-03-2484-19099/+41542
* Update version number in readiness for V10.3.0 release. Sync SVN with reviewe...yuhzheng2020-02-071290-72564/+2429
* Update libraries and sundry check-ins ready for the V10.3.0 kernel release.rtel2020-02-0621-105/+105
* Correct an err in queue.c introduced when previously updating behaviour when ...rtel2020-01-293-25/+57
* Cleaning up LPC51U68 projects:yuhzheng2020-01-249-33/+37
* Add MPU demo project for Nulceo-L152RE which is Coretx-M3.gaurav-aws2020-01-2375-0/+74539
* Ensure both one-shot and auto-reload are written consistently with a hyphen i...rtel2020-01-1618-81/+96
* Add MPU demo project for LPC54018 board.gaurav-aws2020-01-1270-0/+67783
* Introduce a port for T-HEAD CK802. A simple demo for T-HEAD CB2201 is also in...yuhzheng2020-01-10122-0/+23374
* Update the GCC and IAR SiFive HiFive rev-b demos to use the new configMTIME_B...rtel2020-01-0915-1688/+2123
* Work in progress update of LPC51U68 MCUXpresso project to rearrange the folde...rtel2020-01-093-46/+46
* Added xTaskAbortDelayFromISR() and ulTaskNotifyValueClear() API functions.rtel2020-01-023-25/+137
* Renamed RISC-V_RV32_SiFive_HiFive1_IAR directory to RISC-V_RV32_SiFive_HiFive...rtel2020-01-0135-8090/+0
* Rename RISC-V_RV32_SiFive_HiFive1-FreedomStudio directory to RISC-V_RV32_SiFi...rtel2020-01-01189-0/+0
* Update RISCC-V-RV32-SiFive_HiFive1_FreedomStudio project to latest tools and ...rtel2020-01-0185-591/+3831
* Rename STM32Cube to GCC for STM32L4 Discovery projects as GCC isgaurav-aws2020-01-01111-0/+0
* - Updates to projects due to demo folder name change. (IAR source file paths ...yuhzheng2019-12-317-208/+185
* Previously the STM32F0518 compiler setting was changed to enable the use of t...rtel2019-12-301-1/+1
* Ensure the CORTEX_M0_STM32F0518_IAR demo builds after updates to the Cortex-M...rtel2019-12-303-2024/+2698
* Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port laye...rtel2019-12-301-719/+364
* Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port laye...rtel2019-12-302-277/+186
* Ensure the XMC1000_IAR_KEIL_GCC projects still build after updates to the Cor...rtel2019-12-306-7153/+8378
* Enable the Win32 comprehensive test/demo build and run when configUSE_QUEUE_S...rtel2019-12-271-14/+26
* Update the LM3Sxxxx_IAR_Keil demo so the IAR project writes to the UART and e...rtel2019-12-277-108/+342
* Remove local paths from the URL filesgaurav-aws2019-12-242-4/+0
* Add IAR MPU project for STM32L475 Discovery Kit IoT Nodegaurav-aws2019-12-2112-112/+3593
* Increase test coverage for queue sets.rtel2019-12-2092-2/+347
* Remove build files accidentally checked in.rtel2019-12-20128-159033/+0
* Add MPU projects for STM32L475 Discovery Kit IoT Nodegaurav-aws2019-12-20103-0/+134687
* Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+). yuhzheng2019-12-18218-0/+208291
* Use linker script variables for MPU setup for Nuvoton M2351 Keil Projectgaurav-aws2019-12-174-75/+90
* Use the linker script variables for MPU setup for Keil Simulator Demogaurav-aws2019-12-172-52/+79
* Move warning suppression for IAR compiler to portmacro.h for v8M portsgaurav-aws2019-12-071-3/+2
* Add software timer to the Win32 blinky demo.rtel2019-11-183-2/+4
* Remove driver files that generate compiler warnings from the RISC-V_Renode_Em...rtel2019-11-1813-1896/+44
* Rename the RISC-V_RV32_SiFive_Hifive1_GCC folder to RISC-V_RV32_SiFive_HiFive...rtel2019-10-22172-0/+0
* Add nano-specs linker option to HiFive1_GCC demo.rtel2019-10-221-2/+2
* Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c f...rtel2019-10-223-8/+8
* Change version and license text in RISC-V_RV32_SiFive_HiFive1_GCC FreeRTOSCon...rtel2019-10-225-176/+44
* Tidy up main_full.c and change alignment of variable accesses in RegTest.S fo...rtel2019-10-223-5/+8
* Rework RISC-V QEMU example to use vanilla Eclipse in place of Freedom Studio....rtel2019-10-227-29/+16
* Add some asserts into the common demo tasks to catch scenarios where the task...rtel2019-10-213-1/+8
* Add the miv-basic.resc reNode script into the RISC-V_Renode_Emulator_SoftCons...rtel2019-10-171-0/+7
* Rename RISC-V-Qemu-sive_e_Freedom_Studio directory to RISC-V-Qemu-sifive_e-Ec...rtel2019-10-1658-0/+0
* Recreate the RISC-V-Qemu demo using Vanilla Eclipse in place of Freedom Studi...rtel2019-10-1615-802/+118
* Add IAR demo for the SiFive RISC-V HiFive Rev B board.rtel2019-10-1417-0/+7889
* Update the RegTest.S file used by several GCC RISC-V demos to ensure correct ...rtel2019-10-143-3/+12
* Tidy up the RISC-V_RV32_SiFive_HiFive1_GCC demo ready for its eventual release.rtel2019-10-14151-22545/+160
* Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup che...rtel2019-10-1311-126/+1021
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