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* Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 rea...rtel2017-12-181449-4352/+2907
* FreeRTOS+TCP: Added ipconfigSOCKET_HAS_USER_WAKE_CALLBACK configuration optio...rtel2017-12-123-3/+11
* Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/Histor...rtel2017-11-291663-183723/+65535
* Update TriCore port to work with latest GCC compiler.rtel2017-08-093-11/+11
* Add MSVC .vs directory to keep the IDE's windows layout.rtel2017-06-011-0/+0
* Correct long time mis-spelled portINITIAL_EXEC_RETURN to portINITIAL_EXC_RETURNrtel2017-05-3016-68/+68
* Update linker script so main stack starts on 8-byte alignment.rtel2017-05-301-1/+1
* Update IAR project for MSP432 to IAR version 8.11.rtel2017-05-305-117/+90
* FreeRTOS.h changes to go with the last tasks.c checkin.rtel2017-05-291-0/+4
* Remove obsolete code from prvCheckTasksWaitingTermination().rtel2017-05-292-26/+19
* Update the MSVC and MingW demos to use the latest FreeRTOS+Trace recorder lib...rtel2017-05-2913-919/+1194
* Remove configurations other than 'debug' from the Win32 demo.rtel2017-05-072-133/+5
* Cosmetic changes only.rtel2017-04-266-59/+59
* Updated name of CORTEX_MPU_CEC_MEC_17xx_Keil_GCC to CORTEX_MPU_CEC_MEC_17xx_5...rtel2017-04-2043-0/+0
* Added traceQUEUE_CREATE_FAILED() trace macros into the queue create functions.rtel2017-04-101-0/+8
* Add more "memory" clobbers into the MPU ports to make them robust to more agg...rtel2017-04-102-47/+93
* Add more "memory" clobbers into asm code of GCC/ARM_CRx_No_GIC port to make i...rtel2017-04-102-6/+6
* Updates to prevent warnings when compiled with LLVM.rtel2017-04-104-25/+79
* Ensure the PIC32 interrupt stack is 8 byte aligned for all values of configIS...rtel2017-04-094-8/+14
* PIC32MZ project using later MPLAB X tools.rtel2017-04-096-103/+111
* Change name of the CEC and MEC directory to CORTEX_CEC_MEC_17xx_51xx_Keil_GCC...rtel2017-04-0483-0/+0
* Change name of the CEC and MEC directory to CORTEX_MPU_CEC_MEC_17xx_51xx_Keil...rtel2017-04-0443-0/+0
* Updates to the Cortex-M tickless idle code to reduce clock slippage.rtel2017-03-2816-516/+697
* Enable button interrupts in the MSP432 demos in order to test code paths when...rtel2017-03-282-2/+44
* Ensure vTaskGetInfo() sets the sate of the currently running task to eRunning...rtel2017-03-271-23/+30
* Maintenance on MSP432 demo.rtel2017-03-099-7961/+9332
* Housekeeping check-in, no code changes.rtel2017-03-0822-22/+22
* Add CEC and MEC 17xx demo that is completely statically allocated. NOT FULLY...rtel2017-03-0840-0/+16555
* Add additional memory barriers into ARM GCC asm code to ensure no re-ordering...rtel2017-03-0716-98/+100
* Introduce vTaskInternalSetTimeOutState() which does not have a critical secti...rtel2017-02-246-10/+33
* Add SimpleLink CC3220SF demo.rtel2017-02-24138-0/+75502
* Update version number in preparation for maintenance release.rtel2017-01-221369-1394/+1395
* Update UltraScale R5 hardware definition and BSP for 2016.4 SDK tools.rtel2017-01-2111-2971/+10914
* Update Zynq MPSoC hardware definition and BSP files to be those shipped with ...rtel2017-01-19229-5051/+19067
* Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaz...rtel2017-01-19267-2156/+8326
* Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing fu...rtel2017-01-1822-309/+78
* Enhanced priority dis-inheritance functionality in the case where a task that...rtel2017-01-167-52/+521
* Rename the CORTEX_MPU_MEC17xx_KEIL_GCC directory to CORTEX_MPU_CEC_MEC_Keil_G...rtel2017-01-0944-1/+4
* Change how volatile is used in some of the standard demos to remove compiler ...rtel2017-01-045-17/+18
* Increase the priority of the Windows threads used by the FreeRTOS Windows por...rtel2017-01-042-45/+49
* Add MPU project for multiple MEC17xx devices.rtel2016-12-1143-0/+19030
* Update TaskNotify.c to test the condition where a direct to task notification...rtel2016-11-2514-221/+1594
* Add support for statically allocated memory protected tasks - previously only...rtel2016-09-2017-36/+5302
* Correct the definition of StaticTask_t and add additional configASSERT() stat...rtel2016-09-144-3/+58
* Introduce configRECORD_STACK_HIGH_ADDRESS, which when set will result in both...rtel2016-09-045-23/+70
* Clean up lint errors.rtel2016-08-165-44/+44
* Changes to core code and port layer:rtel2016-08-1632-195/+1176
* Remove clrex instruction from Cortex-M ports again as it is implicit in inter...rtel2016-06-2814-25/+0
* Improvements to the Cortex-M ports:rtel2016-06-2723-40/+139
* Final check in before tagging V9.0.0.rtel2016-05-2513-2196/+10
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