sparc-opts.h (enum processor_type): Rename to...

	* config/sparc/sparc-opts.h (enum processor_type): Rename to...
	(enum sparc_processor_type): ...this.
	(enum sparc_code_model_type): New enumeration type.
	(enum sparc_memory_model_type): Tweak comments.
	* config/sparc/sparc.opt (mcpu): Adjust to above renaming.
	(mtune): Likewise.
	(mcmodel): Use sparc_code_model enumeration and variable.
	(sparc_code_model): New enumeration.
	(mdebug): Add Undocumented marker.
	* config/sparc/sparc.h (enum cmodel): Delete.
	(sparc_cmodel): Likewise.
	(TARGET_CM_MEDLOW): Adjust to above renaming.
	(TARGET_CM_MEDMID): Likewise.
	(TARGET_CM_MEDANY): Likewise.
	(TARGET_CM_EMBMEDANY): Likewise.
	* config/sparc/sparc.c (sparc_cmodel): Delete.
	(sparc_option_override): Remove string/value mapping support for the
	code model.  Move code and memory model support to after the handling
	of target flags.  Do private machine setup last.
	(sparc_emit_set_symbolic_const64): Use sparc_code_model.
	(sparc_legitimize_reload_address): Likewise.
	(sparc_output_mi_thunk): Likewise.
	* config/sparc/sparc.md (cpu): Adjust comment to above renaming.

From-SVN: r269232

6 files changed, 148 insertions, 131 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b7404cc9936..bf5cf95fe26 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,29 @@
+2019-02-26  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* config/sparc/sparc-opts.h (enum processor_type): Rename to...
+	(enum sparc_processor_type): ...this.
+	(enum sparc_code_model_type): New enumeration type.
+	(enum sparc_memory_model_type): Tweak comments.
+	* config/sparc/sparc.opt (mcpu): Adjust to above renaming.
+	(mtune): Likewise.
+	(mcmodel): Use sparc_code_model enumeration and variable.
+	(sparc_code_model): New enumeration.
+	(mdebug): Add Undocumented marker.
+	* config/sparc/sparc.h (enum cmodel): Delete.
+	(sparc_cmodel): Likewise.
+	(TARGET_CM_MEDLOW): Adjust to above renaming.
+	(TARGET_CM_MEDMID): Likewise.
+	(TARGET_CM_MEDANY): Likewise.
+	(TARGET_CM_EMBMEDANY): Likewise.
+	* config/sparc/sparc.c (sparc_cmodel): Delete.
+	(sparc_option_override): Remove string/value mapping support for the
+	code model.  Move code and memory model support to after the handling
+	of target flags.  Do private machine setup last.
+	(sparc_emit_set_symbolic_const64): Use sparc_code_model.
+	(sparc_legitimize_reload_address): Likewise.
+	(sparc_output_mi_thunk): Likewise.
+	* config/sparc/sparc.md (cpu): Adjust comment to above renaming.
+
 2019-02-26  Jakub Jelinek  <jakub@redhat.com>
 
 	PR tree-optimization/89500
diff --git a/gcc/config/sparc/sparc-opts.h b/gcc/config/sparc/sparc-opts.h
index d1a419d74c9..3018f0180eb 100644
--- a/gcc/config/sparc/sparc-opts.h
+++ b/gcc/config/sparc/sparc-opts.h
@@ -20,10 +20,10 @@ along with GCC; see the file COPYING3.  If not see
 #ifndef SPARC_OPTS_H
 #define SPARC_OPTS_H
 
-/* Processor type.
+/* SPARC processor type.
    These must match the values for the cpu attribute in sparc.md and
    the table in sparc_option_override.  */
-enum processor_type {
+enum sparc_processor_type {
   PROCESSOR_V7,
   PROCESSOR_CYPRESS,
   PROCESSOR_V8,
@@ -50,10 +50,19 @@ enum processor_type {
   PROCESSOR_NATIVE
 };
 
-/* Sparc system memory model.  See Appendix D in the Sparc V9 manual
-   for formal specification, and Appendix J for more discussion.  */
+/* SPARC-V9 code model type.  See sparc.h for the full description.  */
+enum sparc_code_model_type {
+  CM_32,	/* 32-bit address space.  */
+  CM_MEDLOW,	/* 32-bit address space.  */
+  CM_MEDMID,	/* 44-bit address space.  */
+  CM_MEDANY,	/* 64-bit address space.  */
+  CM_EMBMEDANY	/* 64-bit address space.  */
+};
+
+/* SPARC memory model type.  See Appendix D in the SPARC-V9 manual
+   for formal specification and Appendix J for more discussion.  */
 enum sparc_memory_model_type {
-  SMM_DEFAULT,	/* Uninitialized.  */
+  SMM_DEFAULT,	/* Processor default.  */
   SMM_RMO,	/* Relaxed Memory Order.  */
   SMM_PSO,	/* Partial Store Order.  */
   SMM_TSO,	/* Total Store Order.  */
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index faddd0661db..7991bc25453 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -724,11 +724,6 @@ static const struct attribute_spec sparc_attribute_table[] =
 };
 #endif
 
-/* Option handling.  */
-
-/* Parsed value.  */
-enum cmodel sparc_cmodel;
-
 char sparc_hard_reg_printed[8];
 
 /* Initialize the GCC target structure.  */
@@ -1636,22 +1631,10 @@ dump_target_flags (const char *prefix, const int flags)
 static void
 sparc_option_override (void)
 {
-  static struct code_model {
-    const char *const name;
-    const enum cmodel value;
-  } const cmodels[] = {
-    { "32", CM_32 },
-    { "medlow", CM_MEDLOW },
-    { "medmid", CM_MEDMID },
-    { "medany", CM_MEDANY },
-    { "embmedany", CM_EMBMEDANY },
-    { NULL, (enum cmodel) 0 }
-  };
-  const struct code_model *cmodel;
   /* Map TARGET_CPU_DEFAULT to value for -m{cpu,tune}=.  */
   static struct cpu_default {
     const int cpu;
-    const enum processor_type processor;
+    const enum sparc_processor_type processor;
   } const cpu_default[] = {
     /* There must be one entry here for each TARGET_CPU value.  */
     { TARGET_CPU_sparc, PROCESSOR_CYPRESS },
@@ -1795,30 +1778,6 @@ sparc_option_override (void)
       target_flags |= MASK_LONG_DOUBLE_128;
     }
 
-  /* Code model selection.  */
-  sparc_cmodel = SPARC_DEFAULT_CMODEL;
-
-#ifdef SPARC_BI_ARCH
-  if (TARGET_ARCH32)
-    sparc_cmodel = CM_32;
-#endif
-
-  if (sparc_cmodel_string != NULL)
-    {
-      if (TARGET_ARCH64)
-	{
-	  for (cmodel = &cmodels[0]; cmodel->name; cmodel++)
-	    if (strcmp (sparc_cmodel_string, cmodel->name) == 0)
-	      break;
-	  if (cmodel->name == NULL)
-	    error ("bad value (%s) for -mcmodel= switch", sparc_cmodel_string);
-	  else
-	    sparc_cmodel = cmodel->value;
-	}
-      else
-	error ("-mcmodel= is not supported on 32-bit systems");
-    }
-
   /* Check that -fcall-saved-REG wasn't specified for out registers.  */
   for (i = 8; i < 16; i++)
     if (!call_used_regs [i])
@@ -1935,6 +1894,48 @@ sparc_option_override (void)
   if (sparc_fix_ut699)
     target_flags &= ~MASK_FSMULD;
 
+#ifdef TARGET_DEFAULT_LONG_DOUBLE_128
+  if (!(target_flags_explicit & MASK_LONG_DOUBLE_128))
+    target_flags |= MASK_LONG_DOUBLE_128;
+#endif
+
+  if (TARGET_DEBUG_OPTIONS)
+    dump_target_flags ("Final target_flags", target_flags);
+
+  /* Set the code model if no -mcmodel option was specified.  */
+  if (global_options_set.x_sparc_code_model)
+    {
+      if (TARGET_ARCH32)
+	error ("-mcmodel= is not supported in 32-bit mode");
+    }
+  else
+    {
+      if (TARGET_ARCH32)
+	sparc_code_model = CM_32;
+      else
+	sparc_code_model = SPARC_DEFAULT_CMODEL;
+    }
+
+  /* Set the memory model if no -mmemory-model option was specified.  */
+  if (!global_options_set.x_sparc_memory_model)
+    {
+      /* Choose the memory model for the operating system.  */
+      enum sparc_memory_model_type os_default = SUBTARGET_DEFAULT_MEMORY_MODEL;
+      if (os_default != SMM_DEFAULT)
+	sparc_memory_model = os_default;
+      /* Choose the most relaxed model for the processor.  */
+      else if (TARGET_V9)
+	sparc_memory_model = SMM_RMO;
+      else if (TARGET_LEON3)
+	sparc_memory_model = SMM_TSO;
+      else if (TARGET_LEON)
+	sparc_memory_model = SMM_SC;
+      else if (TARGET_V8)
+	sparc_memory_model = SMM_PSO;
+      else
+	sparc_memory_model = SMM_SC;
+    }
+
   /* Supply a default value for align_functions.  */
   if (flag_align_functions && !str_align_functions)
     {
@@ -1958,12 +1959,7 @@ sparc_option_override (void)
   if (!TARGET_ARCH64)
     targetm.asm_out.unaligned_op.di = NULL;
 
-  /* Do various machine dependent initializations.  */
-  sparc_init_modes ();
-
-  /* Set up function hooks.  */
-  init_machine_status = sparc_init_machine_status;
-
+  /* Set the processor costs.  */
   switch (sparc_cpu)
     {
     case PROCESSOR_V7:
@@ -2021,33 +2017,6 @@ sparc_option_override (void)
       gcc_unreachable ();
     };
 
-  if (sparc_memory_model == SMM_DEFAULT)
-    {
-      /* Choose the memory model for the operating system.  */
-      enum sparc_memory_model_type os_default = SUBTARGET_DEFAULT_MEMORY_MODEL;
-      if (os_default != SMM_DEFAULT)
-	sparc_memory_model = os_default;
-      /* Choose the most relaxed model for the processor.  */
-      else if (TARGET_V9)
-	sparc_memory_model = SMM_RMO;
-      else if (TARGET_LEON3)
-	sparc_memory_model = SMM_TSO;
-      else if (TARGET_LEON)
-	sparc_memory_model = SMM_SC;
-      else if (TARGET_V8)
-	sparc_memory_model = SMM_PSO;
-      else
-	sparc_memory_model = SMM_SC;
-    }
-
-#ifdef TARGET_DEFAULT_LONG_DOUBLE_128
-  if (!(target_flags_explicit & MASK_LONG_DOUBLE_128))
-    target_flags |= MASK_LONG_DOUBLE_128;
-#endif
-
-  if (TARGET_DEBUG_OPTIONS)
-    dump_target_flags ("Final target_flags", target_flags);
-
   /* PARAM_SIMULTANEOUS_PREFETCHES is the number of prefetches that
      can run at the same time.  More important, it is the threshold
      defining when additional prefetches will be dropped by the
@@ -2146,6 +2115,12 @@ sparc_option_override (void)
      redundant 32-to-64-bit extensions.  */
   if (!global_options_set.x_flag_ree && TARGET_ARCH32)
     flag_ree = 0;
+
+  /* Do various machine dependent initializations.  */
+  sparc_init_modes ();
+
+  /* Set up function hooks.  */
+  init_machine_status = sparc_init_machine_status;
 }
 
 /* Miscellaneous utilities.  */
@@ -2460,8 +2435,8 @@ sparc_emit_set_symbolic_const64 (rtx op0, rtx op1, rtx temp)
       temp = gen_rtx_REG (DImode, REGNO (temp));
     }
 
-  /* SPARC-V9 code-model support.  */
-  switch (sparc_cmodel)
+  /* SPARC-V9 code model support.  */
+  switch (sparc_code_model)
     {
     case CM_MEDLOW:
       /* The range spanned by all instructions in the object is less
@@ -5105,7 +5080,7 @@ sparc_legitimize_reload_address (rtx x, machine_mode mode,
       && GET_MODE (x) == SImode
       && GET_CODE (x) != LO_SUM
       && GET_CODE (x) != HIGH
-      && sparc_cmodel <= CM_MEDLOW
+      && sparc_code_model <= CM_MEDLOW
       && !(flag_pic
 	   && (symbolic_operand (x, Pmode) || pic_address_needs_scratch (x))))
     {
@@ -12455,7 +12430,7 @@ sparc_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
 	}
       else  /* TARGET_ARCH64 */
         {
-	  switch (sparc_cmodel)
+	  switch (sparc_code_model)
 	    {
 	    case CM_MEDLOW:
 	    case CM_MEDMID:
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index b5ede667649..015065ffb81 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -90,23 +90,12 @@ along with GCC; see the file COPYING3.  If not see
 
    Different code models are not supported in 32-bit environment.  */
 
-enum cmodel {
-  CM_32,
-  CM_MEDLOW,
-  CM_MEDMID,
-  CM_MEDANY,
-  CM_EMBMEDANY
-};
-
-/* One of CM_FOO.  */
-extern enum cmodel sparc_cmodel;
-
-/* V9 code model selection.  */
-#define TARGET_CM_MEDLOW    (sparc_cmodel == CM_MEDLOW)
-#define TARGET_CM_MEDMID    (sparc_cmodel == CM_MEDMID)
-#define TARGET_CM_MEDANY    (sparc_cmodel == CM_MEDANY)
-#define TARGET_CM_EMBMEDANY (sparc_cmodel == CM_EMBMEDANY)
+#define TARGET_CM_MEDLOW    (sparc_code_model == CM_MEDLOW)
+#define TARGET_CM_MEDMID    (sparc_code_model == CM_MEDMID)
+#define TARGET_CM_MEDANY    (sparc_code_model == CM_MEDANY)
+#define TARGET_CM_EMBMEDANY (sparc_code_model == CM_EMBMEDANY)
 
+/* Default code model to be overridden in 64-bit environment.  */
 #define SPARC_DEFAULT_CMODEL CM_32
 
 /* Do not use the .note.GNU-stack convention by default.  */
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 8a5fbf59f67..a1bf557d3eb 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -224,7 +224,7 @@
 ;; 'f' for all DF/TFmode values, including those that are specific to the v8.
 
 ;; Attribute for cpu type.
-;; These must match the values of the enum processor_type in sparc-opts.h.
+;; These must match the values of enum sparc_processor_type in sparc-opts.h.
 (define_attr "cpu"
   "v7,
    cypress,
diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt
index 8bd812332e9..e5c9b09e5cb 100644
--- a/gcc/config/sparc/sparc.opt
+++ b/gcc/config/sparc/sparc.opt
@@ -138,94 +138,112 @@ Target Report InverseMask(SV_MODE)
 Do not generate code that can only run in supervisor mode (default).
 
 mcpu=
-Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
-Use features of and schedule code for given CPU.
+Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor) Init(PROCESSOR_V7)
+Use instructions of and schedule code for given CPU.
 
 mtune=
-Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
+Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor) Init(PROCESSOR_V7)
 Schedule code for given CPU.
 
 Enum
-Name(sparc_processor_type) Type(enum processor_type)
+Name(sparc_processor) Type(enum sparc_processor_type)
 
 EnumValue
-Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
+Enum(sparc_processor) String(native) Value(PROCESSOR_NATIVE) DriverOnly
 
 EnumValue
-Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
+Enum(sparc_processor) String(v7) Value(PROCESSOR_V7)
 
 EnumValue
-Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
+Enum(sparc_processor) String(cypress) Value(PROCESSOR_CYPRESS)
 
 EnumValue
-Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
+Enum(sparc_processor) String(v8) Value(PROCESSOR_V8)
 
 EnumValue
-Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
+Enum(sparc_processor) String(supersparc) Value(PROCESSOR_SUPERSPARC)
 
 EnumValue
-Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
+Enum(sparc_processor) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
 
 EnumValue
-Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
+Enum(sparc_processor) String(leon) Value(PROCESSOR_LEON)
 
 EnumValue
-Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)
+Enum(sparc_processor) String(leon3) Value(PROCESSOR_LEON3)
 
 EnumValue
-Enum(sparc_processor_type) String(leon3v7) Value(PROCESSOR_LEON3V7)
+Enum(sparc_processor) String(leon3v7) Value(PROCESSOR_LEON3V7)
 
 EnumValue
-Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
+Enum(sparc_processor) String(sparclite) Value(PROCESSOR_SPARCLITE)
 
 EnumValue
-Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
+Enum(sparc_processor) String(f930) Value(PROCESSOR_F930)
 
 EnumValue
-Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
+Enum(sparc_processor) String(f934) Value(PROCESSOR_F934)
 
 EnumValue
-Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
+Enum(sparc_processor) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
 
 EnumValue
-Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
+Enum(sparc_processor) String(sparclet) Value(PROCESSOR_SPARCLET)
 
 EnumValue
-Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
+Enum(sparc_processor) String(tsc701) Value(PROCESSOR_TSC701)
 
 EnumValue
-Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
+Enum(sparc_processor) String(v9) Value(PROCESSOR_V9)
 
 EnumValue
-Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
+Enum(sparc_processor) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
 
 EnumValue
-Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
+Enum(sparc_processor) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
 
 EnumValue
-Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
+Enum(sparc_processor) String(niagara) Value(PROCESSOR_NIAGARA)
 
 EnumValue
-Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
+Enum(sparc_processor) String(niagara2) Value(PROCESSOR_NIAGARA2)
 
 EnumValue
-Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
+Enum(sparc_processor) String(niagara3) Value(PROCESSOR_NIAGARA3)
 
 EnumValue
-Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
+Enum(sparc_processor) String(niagara4) Value(PROCESSOR_NIAGARA4)
 
 EnumValue
-Enum(sparc_processor_type) String(niagara7) Value(PROCESSOR_NIAGARA7)
+Enum(sparc_processor) String(niagara7) Value(PROCESSOR_NIAGARA7)
 
 EnumValue
-Enum(sparc_processor_type) String(m8) Value(PROCESSOR_M8)
+Enum(sparc_processor) String(m8) Value(PROCESSOR_M8)
 
 mcmodel=
-Target RejectNegative Joined Var(sparc_cmodel_string)
+Target RejectNegative Joined Var(sparc_code_model) Enum(sparc_code_model) Init(CM_32)
 Use given SPARC-V9 code model.
 
+Enum
+Name(sparc_code_model) Type(enum sparc_code_model_type)
+
+EnumValue
+Enum(sparc_code_model) String(32) Value(CM_32)
+
+EnumValue
+Enum(sparc_code_model) String(medlow) Value(CM_MEDLOW)
+
+EnumValue
+Enum(sparc_code_model) String(medmid) Value(CM_MEDMID)
+
+EnumValue
+Enum(sparc_code_model) String(medany) Value(CM_MEDANY)
+
+EnumValue
+Enum(sparc_code_model) String(embmedany) Value(CM_EMBMEDANY)
+
 mdebug=
-Target RejectNegative Joined Var(sparc_debug_string)
+Target RejectNegative Joined Undocumented Var(sparc_debug_string)
 Enable debug output.
 
 mstd-struct-return