Revert "i386: Prefer remote atomic insn for atomic_fetch{add, and, or, xor}"

This reverts commit 48fa4131e419942efc9dd762694fdc7e819de392.

4 files changed, 4 insertions, 62 deletions

diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index abb1e5ecbdc..415c52e1bb4 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -1246,7 +1246,3 @@ Support PREFETCHI built-in functions and code generation.
 mraoint
 Target Mask(ISA2_RAOINT) Var(ix86_isa_flags2) Save
 Support RAOINT built-in functions and code generation.
-
-mprefer-remote-atomic
-Target Var(flag_prefer_remote_atomic) Init(0)
-Prefer use remote atomic insn for atomic operations.
diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
index 250899160c3..e6543a5efb0 100644
--- a/gcc/config/i386/sync.md
+++ b/gcc/config/i386/sync.md
@@ -791,28 +791,7 @@
 (define_code_iterator any_plus_logic [and ior xor plus])
 (define_code_attr plus_logic [(and "and") (ior "or") (xor "xor") (plus "add")])
 
-(define_expand "atomic_<plus_logic><mode>"
-  [(match_operand:SWI 0 "memory_operand")
-   (any_plus_logic:SWI (match_dup 0)
-                      (match_operand:SWI 1 "nonmemory_operand"))
-   (match_operand:SI 2 "const_int_operand")]
-  ""
-{
-  if (flag_prefer_remote_atomic
-      && TARGET_RAOINT && operands[2] == const0_rtx
-      && (<MODE>mode == SImode || <MODE>mode == DImode))
-  {
-    if (CONST_INT_P (operands[1]))
-      operands[1] = force_reg (<MODE>mode, operands[1]);
-    emit_insn (maybe_gen_rao_a (<CODE>, <MODE>mode, operands[0], operands[1]));
-  }
-  else
-    emit_insn (gen_atomic_<plus_logic><mode>_1 (operands[0], operands[1],
-						operands[2]));
-  DONE;
-})
-
-(define_insn "@rao_a<plus_logic><mode>"
+(define_insn "rao_a<plus_logic><mode>"
   [(set (match_operand:SWI48 0 "memory_operand" "+m")
        (unspec_volatile:SWI48
          [(any_plus_logic:SWI48 (match_dup 0)
@@ -822,7 +801,7 @@
   "TARGET_RAOINT"
   "a<plus_logic>\t{%1, %0|%0, %1}")
 
-(define_insn "atomic_add<mode>_1"
+(define_insn "atomic_add<mode>"
   [(set (match_operand:SWI 0 "memory_operand" "+m")
 	(unspec_volatile:SWI
 	  [(plus:SWI (match_dup 0)
@@ -876,7 +855,7 @@
   return "lock{%;} %K2sub{<imodesuffix>}\t{%1, %0|%0, %1}";
 })
 
-(define_insn "atomic_<logic><mode>_1"
+(define_insn "atomic_<logic><mode>"
   [(set (match_operand:SWI 0 "memory_operand" "+m")
 	(unspec_volatile:SWI
 	  [(any_logic:SWI (match_dup 0)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 94a2e20cfc1..975ee64103f 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1438,7 +1438,7 @@ See RS/6000 and PowerPC Options.
 -mrdseed  -msgx -mavx512vp2intersect -mserialize -mtsxldtrk@gol
 -mamx-tile  -mamx-int8  -mamx-bf16 -muintr -mhreset -mavxvnni@gol
 -mavx512fp16 -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 @gol
--mprefetchi -mraoint -mprefer-remote-atomic@gol
+-mprefetchi -mraoint @gol
 -mcldemote  -mms-bitfields  -mno-align-stringops  -minline-all-stringops @gol
 -minline-stringops-dynamically  -mstringop-strategy=@var{alg} @gol
 -mkl -mwidekl @gol
@@ -33676,10 +33676,6 @@ execute pause if load value is not expected. This reduces excessive
 cachline bouncing when and works for all atomic logic fetch builtins
 that generates compare and swap loop.
 
-@item -mprefer-remote-atomic
-@opindex mprefer-remote-atomic
-Prefer use remote atomic insn for atomic operations.
-
 @item -mindirect-branch=@var{choice}
 @opindex mindirect-branch
 Convert indirect call and jump with @var{choice}.  The default is
diff --git a/gcc/testsuite/gcc.target/i386/raoint-atomic-fetch.c b/gcc/testsuite/gcc.target/i386/raoint-atomic-fetch.c
deleted file mode 100644
index ac4099d888e..00000000000
--- a/gcc/testsuite/gcc.target/i386/raoint-atomic-fetch.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-mraoint -O2 -mprefer-remote-atomic" } */
-/* { dg-final { scan-assembler-times "aadd" 2 { target {! ia32 } } } } */
-/* { dg-final { scan-assembler-times "aand" 2 { target {! ia32 } } } } */
-/* { dg-final { scan-assembler-times "aor" 2 { target {! ia32 } } } } */
-/* { dg-final { scan-assembler-times "axor" 2 { target {! ia32 } } } } */
-/* { dg-final { scan-assembler-times "aadd" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-times "aand" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-times "aor" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-times "axor" 1 { target ia32 } } } */
-volatile int x;
-volatile long long y;
-int *a;
-long long *b;
-
-void extern
-rao_int_test (void)
-{
-  __atomic_add_fetch (a, x, __ATOMIC_RELAXED);
-  __atomic_and_fetch (a, x, __ATOMIC_RELAXED);
-  __atomic_or_fetch (a, x, __ATOMIC_RELAXED);
-  __atomic_xor_fetch (a, x, __ATOMIC_RELAXED);
-#ifdef __x86_64__
-  __atomic_add_fetch (b, y, __ATOMIC_RELAXED);
-  __atomic_and_fetch (b, y, __ATOMIC_RELAXED);
-  __atomic_or_fetch (b, y, __ATOMIC_RELAXED);
-  __atomic_xor_fetch (b, y, __ATOMIC_RELAXED);
-#endif
-}