diff options
| author | prathamesh.kulkarni <prathamesh.kulkarni@linaro.org> | 2021-06-21 14:38:32 +0530 |
|---|---|---|
| committer | prathamesh.kulkarni <prathamesh.kulkarni@linaro.org> | 2021-06-21 14:41:12 +0530 |
| commit | 29a539a675b8ffd8e20fd3926d6ba0482ea0f275 (patch) | |
| tree | 7963414caccdaa5a355600dc8a0551b438672d17 | |
| parent | 90f78d5d86598f8cadacfb20d8d98c122a466599 (diff) | |
| download | gcc-29a539a675b8ffd8e20fd3926d6ba0482ea0f275.tar.gz | |
arm/97906: Adjust neon_vca patterns to use GLTE instead of GTGE iterator.
gcc/ChangeLog:
PR target/97906
* config/arm/iterators.md (NEON_VACMP): Remove.
* config/arm/neon.md (neon_vca<cmp_op><mode>): Use GLTE instead of GTGE
iterator.
(neon_vca<cmp_op><mode>_insn): Likewise.
(neon_vca<cmp_op_unsp><mode>_insn_unspec): Use NEON_VAGLTE instead of
NEON_VACMP.
gcc/testsuite/ChangeLog:
PR target/97906
* gcc.target/arm/simd/pr97906.c: New test.
| -rw-r--r-- | gcc/config/arm/iterators.md | 2 | ||||
| -rw-r--r-- | gcc/config/arm/neon.md | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/simd/pr97906.c | 13 |
3 files changed, 16 insertions, 5 deletions
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 5c4fe895268..fafbd2f94b8 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -364,8 +364,6 @@ (define_int_iterator NEON_VCMP [UNSPEC_VCEQ UNSPEC_VCGT UNSPEC_VCGE UNSPEC_VCLT UNSPEC_VCLE]) -(define_int_iterator NEON_VACMP [UNSPEC_VCAGE UNSPEC_VCAGT]) - (define_int_iterator NEON_VAGLTE [UNSPEC_VCAGE UNSPEC_VCAGT UNSPEC_VCALE UNSPEC_VCALT]) diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 392d9607919..81cc8d36d55 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -2387,7 +2387,7 @@ (define_expand "neon_vca<cmp_op><mode>" [(set (match_operand:<V_cmp_result> 0 "s_register_operand") (neg:<V_cmp_result> - (GTGE:<V_cmp_result> + (GLTE:<V_cmp_result> (abs:VCVTF (match_operand:VCVTF 1 "s_register_operand")) (abs:VCVTF (match_operand:VCVTF 2 "s_register_operand")))))] "TARGET_NEON" @@ -2406,7 +2406,7 @@ (define_insn "neon_vca<cmp_op><mode>_insn" [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w") (neg:<V_cmp_result> - (GTGE:<V_cmp_result> + (GLTE:<V_cmp_result> (abs:VCVTF (match_operand:VCVTF 1 "s_register_operand" "w")) (abs:VCVTF (match_operand:VCVTF 2 "s_register_operand" "w")))))] "TARGET_NEON && flag_unsafe_math_optimizations" @@ -2418,7 +2418,7 @@ [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w") (unspec:<V_cmp_result> [(match_operand:VCVTF 1 "s_register_operand" "w") (match_operand:VCVTF 2 "s_register_operand" "w")] - NEON_VACMP))] + NEON_VAGLTE))] "TARGET_NEON" "vac<cmp_op_unsp>.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2" [(set_attr "type" "neon_fp_compare_s<q>")] diff --git a/gcc/testsuite/gcc.target/arm/simd/pr97906.c b/gcc/testsuite/gcc.target/arm/simd/pr97906.c new file mode 100644 index 00000000000..7c972e311ed --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/pr97906.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math" } */ +/* { dg-add-options arm_neon } */ + +#include <arm_neon.h> + +uint32x2_t f1(float32x2_t a, float32x2_t b) +{ + return vabs_f32 (a) >= vabs_f32 (b); +} + +/* { dg-final { scan-assembler-times {\tvacle.f32\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-not "vabs" } } */ |